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HCS08 bảng dữ liệu(PDF) 87 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 87 Page - NXP Semiconductors |
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87 / 316 page ![]() Chapter 6 Parallel Input/Output Control MC9S08SG8 MCU Series Data Sheet, Rev. 8 Freescale Semiconductor 87 6.6.2.7 Port B Interrupt Pin Select Register (PTBPS) 6.6.2.8 Port B Interrupt Edge Select Register (PTBES) 76 54 321 0 R 000 0 PTBPS3 PTBPS2 PTBPS1 PTBPS0 W Reset: 000 00 000 Figure 6-17. Port B Interrupt Pin Select Register (PTBPS) Table 6-16. PTBPS Register Field Descriptions Field Description 3:0 PTBPS[3:0] Port B Interrupt Pin Selects — Each of the PTBPSn bits enable the corresponding port B interrupt pin. 0 Pin not enabled as interrupt. 1 Pin enabled as interrupt. 76 54 321 0 R 000 0 PTBES3 PTBES2 PTBES1 PTBES0 W Reset: 000 00 000 Figure 6-18. Port B Edge Select Register (PTBES) Table 6-17. PTBES Register Field Descriptions Field Description 3:0 PTBES[3:0] Port B Edge Selects — Each of the PTBESn bits serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-up or pull-down device if enabled. 0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation. 1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt generation. |
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