HCS08 datasheet(18/316 Pages) NXP

18 / 316 page

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

Section Number

Title

Page

15.4.5 SPI Data Register (SPID) ...............................................................................................229

15.5 Functional Description ..................................................................................................................230

15.5.1 SPI Clock Formats ..........................................................................................................230

15.5.2 SPI Interrupts ..................................................................................................................233

15.5.3 Mode Fault Detection .....................................................................................................233

Chapter 16

Timer Pulse-Width Modulator (S08TPMV3)

16.1 Introduction ...................................................................................................................................235

16.1.1 ACMP/TPM Configuration Information ........................................................................235

16.1.2 TPM Configuration Information .....................................................................................235

16.1.3 TPMV3 Differences from Previous Versions .................................................................236

16.1.4 Migrating from TPMV1 ..................................................................................................238

16.1.5 Features ...........................................................................................................................240

16.1.6 Modes of Operation ........................................................................................................240

16.1.7 Block Diagram ................................................................................................................241

16.2 Signal Description .........................................................................................................................243

16.2.1 Detailed Signal Descriptions ..........................................................................................243

16.3 Register Definition ........................................................................................................................247

16.3.1 TPM Status and Control Register (TPMxSC) ................................................................247

16.3.2 TPM-Counter Registers (TPMxCNTH:TPMxCNTL) ....................................................248

16.3.3 TPM Counter Modulo Registers (TPMxMODH:TPMxMODL) ....................................249

16.3.4 TPM Channel n Status and Control Register (TPMxCnSC) ..........................................250

16.3.5 TPM Channel Value Registers (TPMxCnVH:TPMxCnVL) ..........................................251

16.4 Functional Description ..................................................................................................................253

16.4.1 Counter ............................................................................................................................253

16.4.2 Channel Mode Selection .................................................................................................255

16.5 Reset Overview .............................................................................................................................258

16.5.1 General ............................................................................................................................258

16.5.2 Description of Reset Operation .......................................................................................258

16.6 Interrupts .......................................................................................................................................258

16.6.1 General ............................................................................................................................258

16.6.2 Description of Interrupt Operation .................................................................................259

Chapter 17

Development Support

17.1 Introduction ...................................................................................................................................261

17.1.1 Forcing Active Background ............................................................................................261

17.1.2 Features ...........................................................................................................................262

17.2 Background Debug Controller (BDC) ..........................................................................................262

17.2.1 BKGD Pin Description ...................................................................................................263

17.2.2 Communication Details ..................................................................................................264

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