HCS08 datasheet(147/316 Pages) NXP

147 / 316 page

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

147

Chapter 10



Internal Clock Source (S08ICSV2)

10.1

Introduction

The internal clock source (ICS) module provides clock source choices for the MCU. The module contains

a frequency-locked loop (FLL) as a clock source that is controllable by either an internal or an external

reference clock. The module can provide this FLL clock or either of the internal or external reference

clocks as a source for the MCU system clock. There are also signals provided to control a low power

oscillator (XOSC) module to allow the use of an external crystal/resonator as the external reference clock.

Whichever clock source is chosen, it is passed through a reduced bus divider (BDIV) which allows a lower

final output clock frequency to be derived.

The bus frequency will be one-half of the ICSOUT frequency.

NOTE

For MC9S08SG8, it is 1.5% deviation for -40 °C to 125 °C

standard-temperature rated devices and 3% deviation for AEC Grade 0

high-temperature rated devices (-40 to 150 °C).

10.1.1

Module Configuration

When the internal reference is enabled in stop mode (IREFSTEN = 1), the voltage regulator must also be

enabled in stop mode by setting the LVDE and LVDSE bits in the SPMSC1 register.

Figure 10-1 shows the MC9S08SG8 block diagram with the ICS module highlighted.

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