HCS08 datasheet(224/316 Pages) NXP

224 / 316 page

Serial Peripheral Interface (S08SPIV3)

MC9S08SG8 MCU Series Data Sheet, Rev.8

224

Freescale Semiconductor

Figure 15-4. SPI Baud Rate Generation

15.2

External Signal Description

The SPI optionally shares four port pins. The function of these pins depends on the settings of SPI control

bits. When the SPI is disabled (SPE = 0), these four pins revert to being general-purpose port I/O pins that

are not controlled by the SPI.

15.2.1

SPSCK — SPI Serial Clock

When the SPI is enabled as a slave, this pin is the serial clock input. When the SPI is enabled as a master,

this pin is the serial clock output.

15.2.2

MOSI — Master Data Out, Slave Data In

When the SPI is enabled as a master and SPI pin control zero (SPC0) is 0 (not bidirectional mode), this

pin is the serial data output. When the SPI is enabled as a slave and SPC0 = 0, this pin is the serial data

input. If SPC0 = 1 to select single-wire bidirectional mode, and master mode is selected, this pin becomes

the bidirectional data I/O pin (MOMI). Also, the bidirectional mode output enable bit determines whether

the pin acts as an input (BIDIROE = 0) or an output (BIDIROE = 1). If SPC0 = 1 and slave mode is

selected, this pin is not used by the SPI and reverts to being a general-purpose port I/O pin.

15.2.3

MISO — Master Data In, Slave Data Out

When the SPI is enabled as a master and SPI pin control zero (SPC0) is 0 (not bidirectional mode), this

pin is the serial data input. When the SPI is enabled as a slave and SPC0 = 0, this pin is the serial data

output. If SPC0 = 1 to select single-wire bidirectional mode, and slave mode is selected, this pin becomes

the bidirectional data I/O pin (SISO) and the bidirectional mode output enable bit determines whether the

pin acts as an input (BIDIROE = 0) or an output (BIDIROE = 1). If SPC0 = 1 and master mode is selected,

this pin is not used by the SPI and reverts to being a general-purpose port I/O pin.

15.2.4

SS — Slave Select

When the SPI is enabled as a slave, this pin is the low-true slave select input. When the SPI is enabled as

a master and mode fault enable is off (MODFEN = 0), this pin is not used by the SPI and reverts to being

a general-purpose port I/O pin. When the SPI is enabled as a master and MODFEN = 1, the slave select

output enable bit determines whether this pin acts as the mode fault input (SSOE = 0) or as the slave select

output (SSOE = 1).

DIVIDE BY

2, 4, 8, 16, 32, 64, 128, or 256

DIVIDE BY

1, 2, 3, 4, 5, 6, 7, or 8

PRESCALER

CLOCK RATE DIVIDER

SPPR2:SPPR1:SPPR0

SPR2:SPR1:SPR0

BUS CLOCK

MASTER

SPI

BIT RATE

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