HCS08 datasheet(219/290 Pages) MOTOROLA

219 / 290 page

Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

219

MC9S08GB/GT

BUSY — Bus Busy

The BUSY bit indicates the status of the bus regardless of slave or master mode. The BUSY bit is set

when a START signal is detected and cleared when a STOP signal is detected.

1 = Bus is busy.

0 = Bus is idle.

ARBL — Arbitration Lost

This bit is set by hardware when the arbitration procedure is lost. The ARBL bit must be cleared by

software, by writing a one to it.

1 = Loss of arbitration.

0 = Standard bus operation.

SRW — Slave Read/Write

When addressed as a slave the SRW bit indicates the value of the R/W command bit of the calling

address sent to the master.

1 = Slave transmit, master reading from slave.

0 = Slave receive, master writing to slave.

IICIF — IIC Interrupt Flag

The IICIF bit is set when an interrupt is pending. This bit must be cleared by software, by writing a

one to it in the interrupt routine. One of the following events can set the IICIF bit:

•

One byte transfer completes

•

Match of slave address to calling address

•

Arbitration lost

1 = Interrupt pending.

0 = No interrupt pending.

RXAK — Receive Acknowledge

When the RXAK bit is low, it indicates an acknowledge signal has been received after the completion

of one byte of data transmission on the bus. If the RXAK bit is high it means that no acknowledge

signal is detected.

1 = No acknowledge received.

0 = Acknowledge received.

HCS08 bảng dữ liệu(PDF) 219 Page - Motorola, Inc