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HCS08 bảng dữ liệu(PDF) 220 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 220 Page - Motorola, Inc |
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220 / 290 page ![]() Inter-Integrated Circuit (IIC) Module MC9S08GB/GT 220 MOTOROLA 13.5.5 IIC Data I/O Register (IICD) Figure 13-9 IIC Data I/O Register (IICD) DATA — Data In master transmit mode, when data is written to the IICD, a data transfer is initiated. The most significant bit is sent first. In master receive mode, reading this register initiates receiving of the next byte of data. NOTE: When transitioning out of master receive mode, the IIC mode should be switched before reading the IICD register to prevent an inadvertent initiation of a master receive data transfer. In slave mode, the same functions are available after an address match has occurred. Note that the TX bit in the IICC must correctly reflect the desired direction of transfer in master and slave modes for the transmission to begin. For instance, if the IIC is configured for master transmit but a master receive is desired, then reading the IICD will not initiate the receive. Reading the IICD will return the last byte received while the IIC is configured in either master receive or slave receive modes. The IICD does not reflect every byte that is transmitted on the IIC bus, nor can software verify that a byte has been written to the IICD correctly by reading it back. In master transmit mode, the first byte of data written to IICD following assertion of MST is used for the address transfer and should comprise of the calling address (in bit 7–bit 1) concatenated with the required R/W bit (in position bit 0). Bit 7 654321 Bit 0 Read: DATA Write: Reset: 00000000 |
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