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HCS08 bảng dữ liệu(PDF) 175 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 175 Page - Motorola, Inc |
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175 / 290 page ![]() Data Sheet — MC9S08GB60/D V1.5 MOTOROLA 175 MC9S08GB/GT Figure 11-3 SCI Transmitter Block Diagram The transmitter is enabled by setting the TE bit in SCIxC2. This queues a preamble character which is one full character frame of logic high. The transmitter then remains idle (TxD pin remains high) until data is available in the transmit data buffer. Programs store data into the transmit data buffer by writing to the SCI data register (SCIxD). The central element of the SCI transmitter is the transmit shift register which is either 10 or 11 bits long depending on the setting in the M control bit. For the remainder of this section, we will assume M = 0, selecting the normal 8-bit data mode. In 8-bit data mode, the shift register holds a start bit, eight data bits, and a stop bit. When the transmit shift register is available for a new SCI character, the value waiting in the transmit data register is transferred to the shift register (synchronized with the baud rate clock) and the transmit data register empty (TDRE) status flag is set to indicate another character may be written to the transmit data buffer at SCIxD. H 8 7 6 5 4 3 2 1 0 L SCID – Tx BUFFER (WRITE-ONLY) INTERNAL BUS 11-BIT TRANSMIT SHIFT REGISTER SHIFT DIRECTION 1 × BAUD RATE CLOCK PARITY GENERATION TRANSMIT CONTROL ENABLE SCI CONTROLS TxD TxD DIRECTION TO TxD PIN LOGIC LOOP CONTROL TO RECEIVE DATA IN TO TxD PIN Tx INTERRUPT REQUEST LOOPS RSRC TIE TC TDRE M PT PE TCIE TE SBK T8 TXDIR |
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