HCS08 datasheet(168/290 Pages) MOTOROLA

168 / 290 page

Timer/PWM (TPM) Module

MC9S08GB/GT

168

MOTOROLA

Figure 10-9 Timer x Counter Modulo Register Low (TPMxMODL)

It is good practice to wait for an overflow interrupt so both bytes of the modulo register can be written well

before a new overflow. An alternative approach is to reset the TPM counter before writing to the TPM

modulo registers to avoid confusion about when the first counter overflow will occur.

10.7.4 Timer x Channel n Status and Control Register (TPMxCnSC)

TPMxCnSC contains the channel interrupt status flag and control bits which are used to configure the

interrupt enable, channel configuration, and pin function.

Figure 10-10 Timer x Channel n Status and Control Register (TPMxCnSC)

CHnF — Channel n Flag

When channel n is configured for input capture, this flag bit is set when an active edge occurs on the

channel n pin. When channel n is an output compare or edge-aligned PWM channel, CHnF is set when

the value in the TPM counter registers matches the value in the TPM channel n value registers. This

flag is seldom used with center-aligned PWMs because it is set every time the counter matches the

channel value register, which correspond to both edges of the active duty cycle period.

A corresponding interrupt is requested when CHnF is set and interrupts are enabled (CHnIE = 1). Clear

CHnF by reading TPMxCnSC while CHnF is set and then writing a logic 0 to CHnF. If another

interrupt request occurs before the clearing sequence is complete, the sequence is reset so CHnF would

remain set after the clear sequence was completed for the earlier CHnF. This is done so a CHnF

interrupt request cannot be lost by clearing a previous CHnF.

Reset clears the CHnF bit. Writing a logic 1 to CHnF has no effect.

1 = Input capture or output compare event occurred on channel n.

0 = No input capture or output compare event occurred on channel n.

Bit 7

654321

Bit 0

Read:

Bit 7

654321

Bit 0

Write:

Reset:

00000000

Bit 7

654321

Bit 0

Read:

CHnF

CHnIE

MSnB

MSnA

ELSnB

ELSnA

Write:

Reset:

00000000

= Unimplemented or Reserved

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