HCS08 datasheet(119/290 Pages) MOTOROLA

119 / 290 page

Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

119

MC9S08GB/GT

CPU registers

Accumulator

CCR

Condition code register

Index register, higher order (most signiﬁcant) 8 bits

Index register, lower order (least signiﬁcant) 8 bits

Program counter

PCH

Program counter, higher order (most signiﬁcant) 8 bits

PCL

Program counter, lower order (least signiﬁcant) 8 bits

Stack pointer

Memory and addressing

A memory location or absolute data, depending on addressing mode

M:M + $0001=

A 16-bit value in two consecutive memory locations. The higher-order (most

signiﬁcant) 8 bits are located at the address of M, and the lower-order (least

signiﬁcant) 8 bits are located at the next higher sequential address.

Condition code register (CCR) bits

Two’s complement overﬂow indicator, bit 7

Half carry, bit 4

Interrupt mask, bit 3

Negative indicator, bit 2

Zero indicator, bit 1

Carry/borrow, bit 0 (carry out of bit 7)

CCR activity notation

–

Bit not affected

Bit forced to 0

Bit forced to 1

Bit set or cleared according to results of operation

Undeﬁned after the operation

Machine coding notation

Low-order 8 bits of a direct address $0000–$00FF (high byte assumed to be

$00)

Upper 8 bits of 16-bit offset

Lower 8 bits of 16-bit offset or 8-bit offset

One byte of immediate data

High-order byte of a 16-bit immediate data value

Low-order byte of a 16-bit immediate data value

High-order byte of 16-bit extended address

Low-order byte of 16-bit extended address

Relative offset

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