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HCS08 bảng dữ liệu(HTML) 105 Page - NXP Semiconductors |
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105 / 316 page  Chapter 7 Central Processor Unit (S08CPUV2) MC9S08SG8 MCU Series Data Sheet, Rev. 8 Freescale Semiconductor 105 RSP Reset Stack Pointer (Low Byte) SPL 0xFF (High Byte Not Affected) INH 9C 1 p – – – – – – RTI Return from Interrupt SP (SP) + 0x0001; Pull (CCR) SP (SP) + 0x0001; Pull (A) SP (SP) + 0x0001; Pull (X) SP (SP) + 0x0001; Pull (PCH) SP (SP) + 0x0001; Pull (PCL) INH 80 9 uuuuufppp Þ Þ Þ Þ Þ Þ RTS Return from Subroutine SP SP + 0x0001PullPCH) SP SP + 0x0001; Pull (PCL) INH 81 5 ufppp – – – – – – SBC #opr8i SBC opr8a SBC opr16a SBC oprx16,X SBC oprx8,X SBC ,X SBC oprx16,SP SBC oprx8,SP Subtract with Carry A (A) – (M) – (C) IMM DIR EXT IX2 IX1 IX SP2 SP1 A2 B2 C2 D2 E2 F2 9E D2 9E E2 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 pp rpp prpp prpp rpp rfp pprpp prpp Þ –– Þ Þ Þ SEC Set Carry Bit (C 1) INH 99 1 p – – – – – 1 SEI Set Interrupt Mask Bit (I 1) INH 9B 1 p – – 1 – – – STA opr8a STA opr16a STA oprx16,X STA oprx8,X STA ,X STA oprx16,SP STA oprx8,SP Store Accumulator in Memory M (A) DIR EXT IX2 IX1 IX SP2 SP1 B7 C7 D7 E7 F7 9E D7 9E E7 dd hh ll ee ff ff ee ff ff 3 4 4 3 2 5 4 wpp pwpp pwpp wpp wp ppwpp pwpp 0 – – Þ Þ – STHX opr8a STHX opr16a STHX oprx8,SP Store H:X (Index Reg.) (M:M + 0x0001) (H:X) DIR EXT SP1 35 96 9E FF dd hh ll ff 4 5 5 wwpp pwwpp pwwpp 0 – – Þ Þ – STOP Enable Interrupts: Stop Processing Refer to MCU Documentation I bit 0; Stop Processing INH 8E 2 fp... – – 0 – – – STX opr8a STX opr16a STX oprx16,X STX oprx8,X STX ,X STX oprx16,SP STX oprx8,SP Store X (Low 8 Bits of Index Register) in Memory M (X) DIR EXT IX2 IX1 IX SP2 SP1 BF CF DF EF FF 9E DF 9E EF dd hh ll ee ff ff ee ff ff 3 4 4 3 2 5 4 wpp pwpp pwpp wpp wp ppwpp pwpp 0 – – Þ Þ – Table 7-2. Instruction Set Summary (Sheet 7 of 9) Source Form Operation Object Code Cyc-by-Cyc Details Affect on CCR VH I N Z C |
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