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HCS08 bảng dữ liệu(PDF) 103 Page - NXP Semiconductors |
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HCS08 bảng dữ liệu(HTML) 103 Page - NXP Semiconductors |
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103 / 316 page  Chapter 7 Central Processor Unit (S08CPUV2) MC9S08SG8 MCU Series Data Sheet, Rev. 8 Freescale Semiconductor 103 INC opr8a INCA INCX INC oprx8,X INC ,X INC oprx8,SP Increment M (M) + 0x01 A (A) + 0x01 X (X) + 0x01 M (M) + 0x01 M (M) + 0x01 M (M) + 0x01 DIR INH INH IX1 IX SP1 3C 4C 5C 6C 7C 9E 6C dd ff ff 5 1 1 5 4 6 rfwpp p p rfwpp rfwp prfwpp Þ –– Þ Þ – JMP opr8a JMP opr16a JMP oprx16,X JMP oprx8,X JMP ,X Jump PC Jump Address DIR EXT IX2 IX1 IX BC CC DC EC FC dd hh ll ee ff ff 3 4 4 3 3 ppp pppp pppp ppp ppp – – – – – – JSR opr8a JSR opr16a JSR oprx16,X JSR oprx8,X JSR ,X Jump to Subroutine PC (PC) + n (n = 1, 2, or 3) Push (PCL); SP (SP) – 0x0001 Push (PCH); SP (SP) – 0x0001 PC Unconditional Address DIR EXT IX2 IX1 IX BD CD DD ED FD dd hh ll ee ff ff 5 6 6 5 5 ssppp pssppp pssppp ssppp ssppp – – – – – – LDA #opr8i LDA opr8a LDA opr16a LDA oprx16,X LDA oprx8,X LDA ,X LDA oprx16,SP LDA oprx8,SP Load Accumulator from Memory A (M) IMM DIR EXT IX2 IX1 IX SP2 SP1 A6 B6 C6 D6 E6 F6 9E D6 9E E6 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 pp rpp prpp prpp rpp rfp pprpp prpp 0 – – Þ Þ – LDHX #opr16i LDHX opr8a LDHX opr16a LDHX ,X LDHX oprx16,X LDHX oprx8,X LDHX oprx8,SP Load Index Register (H:X) H:X M:M+ 0x0001 IMM DIR EXT IX IX2 IX1 SP1 45 55 32 9E AE 9E BE 9E CE 9E FE jj kk dd hh ll ee ff ff ff 3 4 5 5 6 5 5 ppp rrpp prrpp prrfp pprrpp prrpp prrpp 0 – – Þ Þ – LDX #opr8i LDX opr8a LDX opr16a LDX oprx16,X LDX oprx8,X LDX ,X LDX oprx16,SP LDX oprx8,SP Load X (Index Register Low) from Memory X (M) IMM DIR EXT IX2 IX1 IX SP2 SP1 AE BE CE DE EE FE 9E DE 9E EE ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 pp rpp prpp prpp rpp rfp pprpp prpp 0 – – Þ Þ – LSL opr8a LSLA LSLX LSL oprx8,X LSL ,X LSL oprx8,SP Logical Shift Left (Same as ASL) DIR INH INH IX1 IX SP1 38 48 58 68 78 9E 68 dd ff ff 5 1 1 5 4 6 rfwpp p p rfwpp rfwp prfwpp Þ –– Þ Þ Þ LSR opr8a LSRA LSRX LSR oprx8,X LSR ,X LSR oprx8,SP Logical Shift Right DIR INH INH IX1 IX SP1 34 44 54 64 74 9E 64 dd ff ff 5 1 1 5 4 6 rfwpp p p rfwpp rfwp prfwpp Þ –– 0 Þ Þ Table 7-2. Instruction Set Summary (Sheet 5 of 9) Source Form Operation Object Code Cyc-by-Cyc Details Affect on CCR VH I N Z C C b0 b7 0 b0 b7 C 0 |
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