HCS08 datasheet(243/316 Pages) NXP

243 / 316 page

Timer/PWM Module (S08TPMV3)

MC9S08SG8 MCU Series Data Sheet, Rev. 8

Freescale Semiconductor

243

The TPM channels are programmable independently as input capture, output compare, or edge-aligned

PWM channels. Alternately, the TPM can be configured to produce CPWM outputs on all channels. When

the TPM is configured for CPWMs, the counter operates as an up/down counter; input capture, output

compare, and EPWM functions are not practical.

If a channel is configured as input capture, an internal pullup device may be enabled for that channel. The

details of how a module interacts with pin controls depends upon the chip implementation because the I/O

pins and associated general purpose I/O controls are not part of the module. Refer to the discussion of the

I/O port logic in a full-chip specification.

Because center-aligned PWMs are usually used to drive 3-phase AC-induction motors and brushless DC

motors, they are typically used in sets of three or six channels.

16.2

Signal Description

Table 16-4 shows the user-accessible signals for the TPM. The number of channels may be varied from

one to eight. When an external clock is included, it can be shared with the same pin as any TPM channel;

however, it could be connected to a separate input pin. Refer to the I/O pin descriptions in full-chip

specification for the specific chip implementation.

Refer to documentation for the full-chip for details about reset states, port connections, and whether there

is any pullup device on these pins.

TPM channel pins can be associated with general purpose I/O pins and have passive pullup devices which

can be enabled with a control bit when the TPM or general purpose I/O controls have configured the

associated pin as an input. When no TPM function is enabled to use a corresponding pin, the pin reverts

to being controlled by general purpose I/O controls, including the port-data and data-direction registers.

Immediately after reset, no TPM functions are enabled, so all associated pins revert to general purpose I/O

control.

16.2.1

Detailed Signal Descriptions

This section describes each user-accessible pin signal in detail. Although Table 16-4 grouped all channel

pins together, any TPM pin can be shared with the external clock source signal. Since I/O pin logic is not

part of the TPM, refer to full-chip documentation for a specific derivative for more details about the

interaction of TPM pin functions and general purpose I/O controls including port data, data direction, and

pullup controls.

Table 16-4. Signal Properties

Name

Function

EXTCLK1

1 When preset, this signal can share any channel pin; however depending upon full-chip

implementation, this signal could be connected to a separate external pin.

External clock source which may be selected to drive the TPM counter.

TPMxCHn2

2 n=channel number (1 to 8)

I/O pin associated with TPM channel n

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