HCS08 datasheet(161/374 Pages) NXP

161 / 374 page

MC9S08JM60 Series Data Sheet, Rev. 5

Freescale Semiconductor

161

11.1.1

Features

The IIC includes these distinctive features:

•

Compatible with IIC bus standard

•

Multi-master operation

•

Software programmable for one of 64 different serial clock frequencies

•

Software selectable acknowledge bit

•

Interrupt driven byte-by-byte data transfer

•

Arbitration lost interrupt with automatic mode switching from master to slave

•

Calling address identification interrupt

•

Start and stop signal generation/detection

•

Repeated start signal generation

•

Acknowledge bit generation/detection

•

Bus busy detection

•

General call recognition

•

10-bit address extension

11.1.2

Modes of Operation

A brief description of the IIC in the various MCU modes is given here.

•

Run mode — This is the basic mode of operation. To conserve power in this mode, disable the

module.

•

Wait mode — The module continues to operate while the MCU is in wait mode and can provide

a wake-up interrupt.

•

Stop mode — The IIC is inactive in stop3 mode for reduced power consumption. The stop

instruction does not affect IIC register states. Stop2 resets the register contents.

11.1.3

Block Diagram

Figure 11-2 is a block diagram of the IIC.

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