TMP88CU74F datasheet(25/132 Pages) TOSHIBA

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TMP88CU74

2003-02-17

88CU74-25

1.5

Interrupt Controller

The TMP88CU74 each have a total of 15 interrupt sources: 6 externals and 9 internals.

Nested interrupt control with priorities is also possible. Two of the internal sources are pseudo

non-maskable interrupts; the remainder are all maskable interrupts.

Interrupt latches (IL) that hold the interrupt requests are provided for interrupt sources.

Each interrupt vector is independent.

The interrupt latch is set to “1” when an interrupt request is generated and requests the CPU

to accept the interrupt. The acceptance of maskable interrupts can be selectively enabled and

disabled by the program using the interrupt master enable flag (IMF) and the individual

interrupt enable flags (EF). When two or more interrupts are generated simultaneously, the

interrupt is accepted in the highest priority order as determined by the hardware. Figure 1.5.1

shows the interrupt controller.

Table 1.5.1 Interrupt Sources

Interrupt Source

Enable Condition

Interrupt

Latch

Vector

Address

Priority

Internal/

External

(Reset)

Non-Maskable

―

FFFFCH

High

Internal

INTSW

(Software interrupt)

―

FFFF8H

Internal

INTWDT

(Watchdog Timer interrupt)

Pseudo

non-maskable

IL2

FFFF4H

External

INT0

(External interrupt 0)

IMF

= 1, INT0EN = 1

IL3

FFFF0H

Internal

INTTC1

(16-bit TC1 interrupt)

IMF･EF4

= 1

IL4

FFFECH

External

INT1

(External interrupt 2)

IMF･EF5

= 1

IL5

FFFE8H

Internal

INTTBT

(Time Base Timer interrupt)

IMF･EF6

= 1

IL6

FFFE4H

External

INT2

(External interrupt 2)

IMF･EF7

= 1

IL7

FFFE0H

Internal

INTTC3

(8-bit TC3 interrupt)

IMF･EF8

= 1

IL8

FFFDCH

Internal

INTSIO1

(Serial Interface1 interrupt)

IMF･EF9

= 1

IL9

FFFD8H

Internal

INTTC4

(8-bit TC4 interrupt)

IMF･EF10

= 1

IL10

FFFD4H

External

INT3

(External interrupt 3)

IMF･EF11

= 1

IL11

FFFD0H

Internal

INTKEY

(Key scan interrupt)

IMF･EF12

= 1

IL12

FFFCCH

Internal

INTSIO2

(Serial interface2 interrupt)

IMF･EF13

= 1

IL13

FFFC8H

Internal

INTTC2

(16-bit TC2 interrupt)

IMF･EF14

= 1

IL14

FFFC4H

External

INT5

(External interrupt 5)

IMF･EF15

= 1

IL15

FFFC0H

Low 15

Note:

Before you change each enable flag (EF) and/or each interrupt latch (IL), be sure to clear the

interrupt master enable flag (IMF) to “0” (to disable interrupts).

a. After a DI instruction is executed

b. When an interrupt is accepted, IMF is automatically cleared to “0”. However, to enable

nested interrupts, change EF and/or IL before setting IMF to “1” (to enable interrupts).

If the individual enable flags (EF) and interrupt latches (IL) are set under conditions other

than the above, the proper operation cannot be guaranteed.

2007-10-19

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