TMP88CU74F datasheet(12/132 Pages) TOSHIBA

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TMP88CU74

2003-02-17

88CU74-12

NORMAL1 mode

In this mode, both the CPU core and on-chip peripherals operate using the

high-frequency clock. The TMP88CU74 is placed in this mode after reset.

IDLE1 mode

In this mode, the internal oscillation circuit remains active. The CPU and the

watchdog timer are halted; however on-chip peripherals remain active (operate

using the high-frequency clock). IDLE1 mode is started by the system control

interrupt request from the on-chip peripherals or external interrupt inputs. When

the IMF (interrupt master enable flag) is “1” (interrupt enable), the execution will

resume with the acceptance of the interrupt, and the operation will return to

normal after the interrupt service is completed. When the IMF is “0” (interrupt

disable), the execution will resume with the instruction which follows the IDLE1

mode start instruction.

STOP1 mode

In this mode, the internal oscillation circuit is turned off, causing all system

operations to be halted. The internal status immediately prior to the halt is held

with a lowest power consumption during STOP1 mode.

STOP1 mode is started by the system control register 1 (SYSCR1), and STOP1

mode is released by an inputting (either level-sensitive or edge-sensitive can be

programmably selected) to the STOP pin. After the warming-up period is

completed, the execution resumes with the instruction which follows the STOP1

mode start instruction.

(2) Dual-clock mode

Both the high-frequency and low-frequency oscillation circuits are used in this mode.

P21 (XTIN) and P22 (XTOUT) pins cannot be used as input/output ports. The main

system clock is obtained from the high-frequency clock in NORMAL2 and IDLE2

modes, and is obtained from the low-frequency clock in SLOW and SLEEP modes. The

machine cycle time is 4/fc [s] in the NORMAL2 and IDLE2 modes, and 4/fs [s] (122

μs

at fs = 32.8 kHz) in the SLOW and SLEEP modes.

The TLCS-870/X is placed in the signal-clock mode during reset. To use the

dual-clock mode, the low-frequency oscillator should be turned on by executing [SET

(SYSCR2), XTEN] instruction.

NORMAL2 mode

In this mode, the CPU core operates using the high-frequency clock. On-chip

peripherals operate using the high-frequency clock and/or low-frequency clock.

SLOW mode

This mode can be used to reduce power-consumption by turning off oscillation of

the high-frequency clock. The CPU core and on-chip peripherals operate using the

low-frequency clock.

Switching back and forth between NORMAL2 and SLOW modes are performed

by the system control register 2 (SYSCR2).

IDLE2 mode

In this mode, the internal oscillation circuit remain active. The CPU and the

watchdog timer are halted; however, on-chip peripherals remain active (operate

using the high-frequency clock and/or the low-frequency clock). Starting and

releasing of IDLE2 mode are the same as for IDLE1 mode, except that operation

returns to NORMAL2 mode.

2007-10-19

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