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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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HCS08 bảng dữ liệu(PDF) 124 Page - Motorola, Inc |
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HCS08 bảng dữ liệu(HTML) 124 Page - Motorola, Inc |
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124 / 290 page  Central Processor Unit (CPU) MC9S08GB/GT 124 MOTOROLA EOR #opr8i EOR opr8a EOR opr16a EOR oprx16,X EOR oprx8,X EOR ,X EOR oprx16,SP EOR oprx8,SP Exclusive OR Memory with Accumulator A ← (A ⊕ M) 0 – – – IMM DIR EXT IX2 IX1 IX SP2 SP1 A8 B8 C8 D8 E8 F8 9ED8 9EE8 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 INC opr8a INCA INCX INC oprx8,X INC ,X INC oprx8,SP Increment M ← (M) + $01 A ← (A) + $01 X ← (X) + $01 M ← (M) + $01 M ← (M) + $01 M ← (M) + $01 –– – DIR INH INH IX1 IX SP1 3C 4C 5C 6C 7C 9E6C dd ff ff 5 1 1 5 4 6 JMP opr8a JMP opr16a JMP oprx16,X JMP oprx8,X JMP ,X Jump PC ← Jump Address – – – – – – DIR EXT IX2 IX1 IX BC CC DC EC FC dd hh ll ee ff ff 3 4 4 3 3 JSR opr8a JSR opr16a JSR oprx16,X JSR oprx8,X JSR ,X Jump to Subroutine PC ← (PC) + n (n = 1, 2, or 3) Push (PCL); SP ← (SP) – $0001 Push (PCH); SP ← (SP) – $0001 PC ← Unconditional Address –––––– DIR EXT IX2 IX1 IX BD CD DD ED FD dd hh ll ee ff ff 5 6 6 5 5 LDA #opr8i LDA opr8a LDA opr16a LDA oprx16,X LDA oprx8,X LDA ,X LDA oprx16,SP LDA oprx8,SP Load Accumulator from Memory A ← (M) 0 – – – IMM DIR EXT IX2 IX1 IX SP2 SP1 A6 B6 C6 D6 E6 F6 9ED6 9EE6 ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 LDHX #opr16i LDHX opr8a LDHX opr16a LDHX ,X LDHX oprx16,X LDHX oprx8,X LDHX oprx8,SP Load Index Register (H:X) from Memory H:X ← (M:M + $0001) 0 –– – IMM DIR EXT IX IX2 IX1 SP1 45 55 32 9EAE 9EBE 9ECE 9EFE jj kk dd hh ll ee ff ff ff 3 4 5 5 6 5 5 LDX #opr8i LDX opr8a LDX opr16a LDX oprx16,X LDX oprx8,X LDX ,X LDX oprx16,SP LDX oprx8,SP Load X (Index Register Low) from Memory X ← (M) 0 –– – IMM DIR EXT IX2 IX1 IX SP2 SP1 AE BE CE DE EE FE 9EDE 9EEE ii dd hh ll ee ff ff ee ff ff 2 3 4 4 3 3 5 4 LSL opr8a LSLA LSLX LSL oprx8,X LSL ,X LSL oprx8,SP Logical Shift Left (Same as ASL) –– DIR INH INH IX1 IX SP1 38 48 58 68 78 9E68 dd ff ff 5 1 1 5 4 6 LSR opr8a LSRA LSRX LSR oprx8,X LSR ,X LSR oprx8,SP Logical Shift Right –– 0 DIR INH INH IX1 IX SP1 34 44 54 64 74 9E64 dd ff ff 5 1 1 5 4 6 MOV opr8a,opr8a MOV opr8a,X+ MOV #opr8i,opr8a MOV ,X+,opr8a Move (M)destination ← (M)source H:X ← (H:X) + $0001 in IX+/DIR and DIR/IX+ Modes 0 –– – DIR/DIR DIR/IX+ IMM/DIR IX+/DIR 4E 5E 6E 7E dd dd dd ii dd dd 5 5 4 5 MUL Unsigned multiply X:A ← (X) × (A) – 0 ––– 0 INH 42 5 Table 7-1 HCS08 Instruction Set Summary (Sheet 4 of 6) Source Form Operation Description Effect on CCR VH I N Z C C b0 b7 0 b0 b7 C 0 |
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