HCS08 datasheet(281/290 Pages) MOTOROLA

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Data Sheet — MC9S08GB60/D V1.5

MOTOROLA

281

MC9S08GB/GT

A.10 FLASH Specifications

This section provides details about program/erase times and program-erase endurance for the FLASH

memory.

Program and erase operations do not require any special power sources other than the normal VDD supply.

For more detailed information about program/erase operations, see the Memory section.

Table A-13 FLASH Characteristics

Characteristic

Symbol

Min

Typical

Max

Unit

Supply voltage for program/erase

Vprog/erase

2.1

3.6

Supply voltage for read operation

0 < fBus < 8 MHz

0 < fBus < 20 MHz

VRead

1.8

2.08

3.6

Internal FCLK frequency(1)

NOTES:

1. The frequency of this clock is controlled by a software setting.

fFCLK

150

200

kHz

Internal FCLK period (1/FCLK)

tFcyc

6.67

µs

Byte program time (random location)(2)

tprog

tFcyc

Byte program time (burst mode)(2)

tBurst

tFcyc

Page erase time(2)

2. These values are hardware state machine controlled. User code does not need to count cycles. This

information supplied for calculating approximate time to program and erase.

tPage

4000

tFcyc

Mass erase time(2)

tMass

20,000

tFcyc

Program/erase endurance(3)

TL to TH = –40°C to + 85°C

T = 25

°C

3. Typical endurance for FLASH was evaluated for this product family on the 9S12Dx64. For additional

information on how Motorola defines typical endurance, please refer to Engineering Bulletin EB619/D,

Typical Endurance for Nonvolatile Memory.

10,000

100,000

—

cycles

Data retention(4)

4. Typical data retention values are based on intrinsic capability of the technology measured at high

temperature and de-rated to 25

°C using the Arrhenius equation. For additional information on how

Motorola defines typical data retention, please refer to Engineering Bulletin EB618/D, Typical Data

Retention for Nonvolatile Memory.

tD_ret

100

—

years

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