HCS08 datasheet(140/316 Pages) NXP

140 / 316 page

Analog-to-Digital Converter (S08ADCV1)

MC9S08SG8 MCU Series Data Sheet, Rev. 8

140

Freescale Semiconductor

2. Update status and control register 2 (ADCSC2) to select the conversion trigger (hardware or

software) and compare function options, if enabled.

3. Update status and control register 1 (ADCSC1) to select whether conversions will be continuous

or completed only once, and to enable or disable conversion complete interrupts. The input channel

on which conversions will be performed is also selected here.

9.5.1.2

Pseudo — Code Example

In this example, the ADC module will be set up with interrupts enabled to perform a single 10-bit

conversion at low power with a long sample time on input channel 1, where the internal ADCK clock will

be derived from the bus clock divided by 1.

ADCCFG = 0x98 (%10011000)

Bit 7

ADLPC

Configures for low power (lowers maximum clock speed)

Bit 6:5 ADIV

Sets the ADCK to the input clock

 1

Bit 4

ADLSMP

Configures for long sample time

Bit 3:2 MODE

Sets mode at 10-bit conversions

Bit 1:0 ADICLK

Selects bus clock as input clock source

ADCSC2 = 0x00 (%00000000)

Bit 7

ADACT

Flag indicates if a conversion is in progress

Bit 6

ADTRG

Software trigger selected

Bit 5

ACFE

Compare function disabled

Bit 4

ACFGT

Not used in this example

Bit 3:2

Unimplemented or reserved, always reads zero

Bit 1:0

Reserved for Freescale’s internal use; always write zero

ADCSC1 = 0x41 (%01000001)

Bit 7

COCO

Read-only flag which is set when a conversion completes

Bit 6

AIEN

Conversion complete interrupt enabled

Bit 5

ADCO

One conversion only (continuous conversions disabled)

Bit 4:0 ADCH

00001 Input channel 1 selected as ADC input channel

ADCRH/L = 0xxx

Holds results of conversion. Read high byte (ADCRH) before low byte (ADCRL) so that conversion

data cannot be overwritten with data from the next conversion.

ADCCVH/L = 0xxx

Holds compare value when compare function enabled

APCTL1=0x02

AD1 pin I/O control disabled. All other AD pins remain general purpose I/O pins

APCTL2=0x00

All other AD pins remain general purpose I/O pins

HCS08 bảng dữ liệu(PDF) 140 Page - NXP Semiconductors

HCS08 bảng dữ liệu(HTML) 140 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL