HCS08 datasheet(278/316 Pages) NXP

278 / 316 page

MC9S08SG8 MCU Series Data Sheet, Rev. 8

278

Freescale Semiconductor

Figure 17-6. System Background Debug Force Reset Register (SBDFR)

17.4.3

DBG Registers and Control Bits

The debug module includes nine bytes of register space for three 16-bit registers and three 8-bit control

and status registers. These registers are located in the high register space of the normal memory map so

they are accessible to normal application programs. These registers are rarely if ever accessed by normal

user application programs with the possible exception of a ROM patching mechanism that uses the

breakpoint logic.

17.4.3.1

Debug Comparator A High Register (DBGCAH)

This register contains compare value bits for the high-order eight bits of comparator A. This register is

forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.

17.4.3.2

Debug Comparator A Low Register (DBGCAL)

This register contains compare value bits for the low-order eight bits of comparator A. This register is

forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.

17.4.3.3

Debug Comparator B High Register (DBGCBH)

This register contains compare value bits for the high-order eight bits of comparator B. This register is

forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.

17.4.3.4

Debug Comparator B Low Register (DBGCBL)

This register contains compare value bits for the low-order eight bits of comparator B. This register is

forced to 0x00 at reset and can be read at any time or written at any time unless ARM = 1.

654

321

000

BDFR1

1 BDFR is writable only through serial background mode debug commands, not from user programs.

Reset

000

= Unimplemented or Reserved

Table 17-3. SBDFR Register Field Description

Field

Description

BDFR

Background Debug Force Reset — A serial active background mode command such as WRITE_BYTE allows

an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot

be written from a user program.

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