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HCS08 bảng dữ liệu(PDF) 161 Page - NXP Semiconductors

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HCS08 bảng dữ liệu(HTML) 161 Page - NXP Semiconductors

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MC9S08SG8 MCU Series Data Sheet, Rev. 8
Freescale Semiconductor
161
Chapter 11
Inter-Integrated Circuit (S08IICV2)
11.1
Introduction
The inter-integrated circuit (IIC) provides a method of communication between a number of devices. The
interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is
capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are limited by a
maximum bus capacitance of 400 pF.
NOTE
The SDA and SCL should not be driven above VDD. These pins are pseudo
open-drain containing a protection diode to VDD.
11.1.1
Module Configuration
The IIC module pins, SDA and SCL can be repositioned under software control using IICPS in SOPT1 as
as shown in Table 11-1. IICPS in SOPT1 selects which general-purpose I/O ports are associated with IIC
operation.
Figure 11-1 shows the MC9S08SG8 block diagram with the IIC module highlighted.
Table 11-1. IIC Position Options
IICPS in SOPT1
Port Pin for SDA
Port Pin for SCL
0 (default)
PTA2
PTA3
1
PTB6
PTB7



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