CY8C52LP datasheet(104/114 Pages) CYPRESS

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PSoC® 5LP: CY8C52LP Family

Datasheet

Document Number: 001-84933 Rev. *L

Page 104 of 114

12. Ordering Information

In addition to the features listed in Table 12-1, every CY8C52LP device includes: up to 256 KB flash, 64 KB SRAM, 2 KB EEPROM,

a precision on-chip voltage reference, precision oscillators, flash, ECC, DMA, a fixed function I2C, JTAG/SWD programming and

debug, external memory interface, boost, and more. In addition to these features, the flexible UDBs and analog subsection support

a wide range of peripherals. To assist you in selecting the ideal part, PSoC Creator makes a part recommendation after you choose

the components required by your application. All CY8C52LP derivatives incorporate device and flash security in user-selectable

security levels; see the TRM for details.

Table 12-1. CY8C52LP Family with ARM Cortex-M3 CPU

Part Number

MCU Core

Analog

Digital

I/O

[85]

Package

JTAG ID

[86]

CY8C5268LTI-LP030

67 256 64 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 48 38 8

68-QFN

0x2E11E069

CY8C5268AXI-LP047

67 256 64 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 72 62 8

100-TQFP

0x2E12F069

CY8C5267AXI-LP051

67 128 32 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 72 62 8

100-TQFP

0x2E133069

CY8C5267LTI-LP089

67 128 32 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 48 38 8

68-QFN

0x2E159069

CY8C5266LTI-LP029

67 64 16 2

✔ 1x12-bit SAR 1 2 0

–

✔ 20 4 ✔ 48 38 8

68-QFN

0x2E11D069

CY8C5266AXI-LP033

67 64 16 2

✔ 1x12-bit SAR 1 2 0

–

✔ 20 4 ✔ 72 62 8

100-TQFP

0x2E121069

CY8C5266AXI-LP132

67 64 16 2

✔ 1x12-bit SAR 1 2 0

–

✔ 20 4 – 70 62 8

100-TQFP

0x2E184069

CY8C5266LTI-LP150

67 64 16 2

✔ 1x12-bit SAR 1 2 0

–

✔ 20 4 – 46 38 8

68-QFN

0x2E196069

CY8C5266FNI-LP205T

67 64 16 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 – 70 62 8

99-WLCSP

0x2E1CD069

CY8C5265LTI-LP050

67 32

✔ 1x12-bit SAR 1 0 0

–

✔ 20 4 ✔ 48 38 8

68-QFN

0x2E132069

CY8C5265AXI-LP056

67 32

✔ 1x12-bit SAR 1 0 0

–

✔ 20 4 ✔ 72 62 8

100-TQFP

0x2E138069

CY8C5265LTI-LP058

67 32

✔ 1x12-bit SAR 1 2 0

–

✔ 20 4 ✔ 48 38 8

68-QFN

0x2E13A069

CY8C5265AXI-LP082

67 32

✔ 1x12-bit SAR 1 2 0

–

✔ 20 4 ✔ 72 62 8

100-TQFP

0x2E152069

CY8C5287AXI-LP095[87] 80 256 64 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 72 62 8

100-TQFP

0x2E15F069

CY8C5288LTI-LP090

80 256 64 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 48 38 8

68-QFN

0x2E15A069

CY8C5288FNI-LP213

80 256 64 2

✔ 1x12-bit SAR 1 2 0

–

✔ 24 4 ✔ 72 62 8

99-WLCSP

0x2E1D5069

Notes

84. UDBs support a wide variety of functionality including SPI, LIN, UART, timer, counter, PWM, PRS, and others. Individual functions may use a fraction of a UDB or

multiple UDBs. Multiple functions can share a single UDB. See Example Peripherals on page 39 for more information on how UDBs can be used.

85. The I/O Count includes all types of digital I/O: GPIO, SIO, and the two USB I/O. See I/O System and Routing on page 32 for details on the functionality of each of

these types of I/O.

86. The JTAG ID has three major fields. The most significant nibble (left digit) is the version, followed by a 2 byte part number and a 3 nibble manufacturer ID.

87. This part varies from the numbering conventions described in Table 12-1. It has 256 KB flash, not 128 KB.

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