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CY8C52LP bảng dữ liệu(PDF) 93 Page - Cypress Semiconductor |
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CY8C52LP bảng dữ liệu(HTML) 93 Page - Cypress Semiconductor |
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93 / 114 page ![]() PSoC® 5LP: CY8C52LP Family Datasheet Document Number: 001-84933 Rev. *L Page 93 of 114 11.7 Memory Specifications are valid for –40 °C TA 85 °C and TJ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted. 11.7.1 Flash 11.7.2 EEPROM Note 61. See PSoC 5 Device Programming Specifications for a description of a low-overhead method of programming PSoC 5 flash. Table 11-42. Flash DC Specifications Parameter Description Conditions Min Typ Max Units Erase and program voltage VDDD pin 1.71 – 5.5 V Table 11-43. Flash AC Specifications Parameter Description Conditions Min Typ Max Units TWRITE Row write time (erase + program) – 15 20 ms TERASE Row erase time – 10 13 ms Row program time – 5 7 ms TBULK Bulk erase time (256 KB) – – 140 ms Sector erase time (16 KB) – – 15 ms TPROG Total device programming time No overhead[61] – 5 7.5 seconds Flash data retention time, retention period measured from last erase cycle Average ambient temp. TA 55 °C, 100 K erase/program cycles 20 – – years Average ambient temp. TA 85 °C, 10 K erase/program cycles 10 – – Table 11-44. EEPROM DC Specifications Parameter Description Conditions Min Typ Max Units Erase and program voltage 1.71 – 5.5 V Table 11-45. EEPROM AC Specifications Parameter Description Conditions Min Typ Max Units TWRITE Single row erase/write cycle time – 10 20 ms EEPROM data retention time, retention period measured from last erase cycle Average ambient temp, TA 25 °C, 1M erase/program cycles 20 – – years Average ambient temp, TA 55 °C, 100 K erase/program cycles 20 – – Average ambient temp. TA 85 °C, 10 K erase/program cycles 10 – – |
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