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CY8C52LP bảng dữ liệu(PDF) 75 Page - Cypress Semiconductor

tên linh kiện CY8C52LP
Giải thích chi tiết về linh kiện  Programmable System-on-Chip (PSoC짰)
PDF  114 Pages
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nhà sản xuất  CYPRESS [Cypress Semiconductor]
Trang chủ  http://www.cypress.com
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CY8C52LP bảng dữ liệu(HTML) 75 Page - Cypress Semiconductor

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PSoC® 5LP: CY8C52LP Family
Datasheet
Document Number: 001-84933 Rev. *L
Page 75 of 114
Figure 11-24. USBIO Output Rise and Fall Times, GPIO Mode,
VDDD = 3.3 V, 25 pF Load
11.4.4 XRES
11.5 Analog Peripherals
Specifications are valid for –40 °C
 TA  85 °C and TJ  100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted.
11.5.1 Voltage Reference
Table 11-15. USB Driver AC Specifications[39]
Parameter
Description
Conditions
Min
Typ
Max
Units
Tr
Transition rise time
–
–
20
ns
Tf
Transition fall time
–
–
20
ns
TR
Rise/fall time matching
VUSB_5, VUSB_3.3, see USB DC
Specifications on page 91
90%
–
111%
Vcrs
Output signal crossover voltage
1.3
–
2
V
Note
39. Based on device characterization (Not production tested).
Table 11-16. XRES DC Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
VIH
Input voltage high threshold
0.7
 VDDIO
––
V
VIL
Input voltage low threshold
–
–
0.3

VDDIO
V
Rpullup
Pull up resistor
3.5
5.6
8.5
k
CIN
Input capacitance[39]
–3
pF
VH
Input voltage hysteresis
(Schmitt-Trigger)[39]
–100
–
mV
Idiode
Current through protection diode to
VDDIO and VSSIO
––
100
µA
Table 11-17. XRES AC Specifications[39]
Parameter
Description
Conditions
Min
Typ
Max
Units
TRESET
Reset pulse width
1
–
–
µs
Table 11-18. Voltage Reference Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
VREF
Precision reference voltage
Initial trimming, 25 °C
1.013 (–1%) 1.024 1.035 (+1%)
V



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