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PSoC® 5LP: CY8C52LP Family

Datasheet

Document Number: 001-84933 Rev. *L

Page 68 of 114

11.4 Inputs and Outputs

Specifications are valid for –40 °C

 TA  85 °C and TJ  100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,

except where noted. Unless otherwise specified, all charts and graphs show typical values.

When the power supplies ramp up, there are low-impedance connections between each GPIO pin and its VDDIO supply. This causes

the pin voltages to track VDDIO until both VDDIO and VDDA reach the IPOR voltage, which can be as high as 1.45 V. At that point the

low-impedance connections no longer exist, and the pins change to their normal NVL settings.

Also, if VDDA is less than VDDIO, a low-impedance path may exist between a GPIO and VDDA, causing the GPIO to track VDDA until

VDDA becomes greater than or equal to VDDIO.

11.4.1 GPIO

Table 11-8. GPIO DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

VIH

Input voltage high threshold

CMOS Input, PRT[x]CTL = 0

0.7

 VDDIO

––

VIL

Input voltage low threshold

CMOS Input, PRT[x]CTL = 0

–

0.3



VDDIO

VIH

Input voltage high threshold

LVTTL Input, PRT[x]CTL = 1,VDDIO

< 2.7 V

0.7 × VDDIO

––

VIH

Input voltage high threshold

LVTTL Input, PRT[x]CTL = 1,

VDDIO  2.7 V

2.0

–

VIL

Input voltage low threshold

LVTTL Input, PRT[x]CTL = 1,VDDIO

< 2.7 V

–

0.3 ×

VDDIO

VIL

Input voltage low threshold

LVTTL Input, PRT[x]CTL = 1,

VDDIO  2.7 V

––

0.8

VOH

Output voltage high

IOH = 4 mA at 3.3 VDDIO

VDDIO – 0.6

–

IOH = 1 mA at 1.8 VDDIO

VDDIO – 0.5

–

VOL

Output voltage low

IOL = 8 mA at 3.3 VDDIO

––

0.6

IOL = 3 mA at 3.3 VDDIO

––

0.4

IOL = 4 mA at 1.8 VDDIO

––

0.6

Rpullup

Pull up resistor

3.5

5.6

8.5



Rpulldown

Pull down resistor

3.5

5.6

8.5



IIL

Input leakage current (absolute

value)[31]

25 °C, VDDIO = 3.0 V

–

CIN

Input capacitance[31]

P0.0, P0.1, P0.2, P3.6, P3.7

–

P0.3, P0.4, P3.0, P3.1, P3.2

–

P0.6, P0.7, P15.0, P15.6, P15.7[32]

–7

All other GPIOs

–

Input voltage hysteresis

(Schmitt-Trigger)[31]

–40

–

Idiode

Current through protection diode to

VDDIO and VSSIO

–

100

µA

Rglobal

Resistance pin to analog global bus 25 °C, VDDIO = 3.0 V

–

320

–



Rmux

Resistance pin to analog mux bus 25 °C, VDDIO = 3.0 V

–

220

–



Notes

31. Based on device characterization (Not production tested).

32. For information on designing with PSoC oscillators, refer to the application note, AN54439 - PSoC® 3 and PSoC 5 External Oscillator.

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