CY8C52LP datasheet(64/114 Pages) CYPRESS

64 / 114 page

PSoC® 5LP: CY8C52LP Family

Datasheet

Document Number: 001-84933 Rev. *L

Page 64 of 114

11.3 Power Regulators

Specifications are valid for –40 °C

 TA  85 °C and TJ  100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,

except where noted.

11.3.1 Digital Core Regulator

Figure 11-5. Analog and Digital Regulators, VCC vs VDD,

10 mA Load

Figure 11-6. Digital Regulator PSRR vs Frequency and VDD

11.3.2 Analog Core Regulator

Figure 11-7. Analog Regulator PSRR vs Frequency and VDD

Table 11-4. Digital Core Regulator DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

VDDD

Input voltage

1.8

–

5.5

VCCD

Output voltage

–

1.80

–

Regulator output capacitor

±10%, X5R ceramic or better. The two VCCD

pins must be shorted together, with as short

a trace as possible, see Power System on

page 26

0.9

1.1

µF

100

0.1

100

1000

Frequency, kHz

Vdd=4.5V

Vdd=3.6V

Vdd=2.7V

Table 11-5. Analog Core Regulator DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

VDDA

Input voltage

1.8

–

5.5

VCCA

Output voltage

–

1.80

–

Regulator output capacitor

±10%, X5R ceramic or better

–

µF

100

0.1

100

1000

Frequency, KHz

Vdd=4.5V

Vdd=3.6V

Vdd=2.7V

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