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CY8C52LP bảng dữ liệu(PDF) 65 Page - Cypress Semiconductor

tên linh kiện CY8C52LP
Giải thích chi tiết về linh kiện  Programmable System-on-Chip (PSoC짰)
PDF  114 Pages
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PSoC® 5LP: CY8C52LP Family
Datasheet
Document Number: 001-84933 Rev. *L
Page 65 of 114
11.3.3 Inductive Boost Regulator
Unless otherwise specified, operating conditions are: VBAT = 0.5 V–3.6 V, VOUT = 1.8 V–5.0 V, IOUT = 0 mA–50 mA,
LBOOST = 4.7 µH–22 µH, CBOOST = 22 µF || 3 × 1.0 µF || 3 × 0.1 µF, CBAT = 22 µF, IF = 1.0 A, excludes 99-pin CSP package. For
information on using boost with 99-pin CSP package please contact Cypress support. Unless otherwise specified, all charts and
graphs show typical values.
Table 11-6. Inductive Boost Regulator DC Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
VOUT
Boost output voltage[26]
vsel = 1.8 V in register BOOST_CR0
1.71
1.8
1.89
V
vsel = 1.9 V in register BOOST_CR0
1.81
1.90
2.00
V
vsel = 2.0 V in register BOOST_CR0
1.90
2.00
2.10
V
vsel = 2.4 V in register BOOST_CR0
2.16
2.40
2.64
V
vsel = 2.7 V in register BOOST_CR0
2.43
2.70
2.97
V
vsel = 3.0 V in register BOOST_CR0
2.70
3.00
3.30
V
vsel = 3.3 V in register BOOST_CR0
2.97
3.30
3.63
V
vsel = 3.6 V in register BOOST_CR0
3.24
3.60
3.96
V
vsel = 5.0 V in register BOOST_CR0
4.50
5.00
5.50
V
VBAT
Input voltage to boost[27]
IOUT = 0 mA–5 mA vsel = 1.8 V–2.0 V,
TA = 0 °C–70 °C
0.5
–
0.8
V
IOUT = 0 mA–15 mA vsel = 1.8 V–5.0 V[28],
TA = –10 °C–85 °C
1.6
–
3.6
V
IOUT = 0 mA–25 mA vsel = 1.8 V–2.7 V,
TA = –10 °C–85 °C
0.8
–
1.6
V
IOUT = 0 mA–50 mA vsel = 1.8 V–3.3 V[28],
TA = –40 °C–85 °C
1.8
–
2.5
V
vsel = 1.8 V–3.3 V[28],
TA = –10 °C–85 °C
1.3
–
2.5
V
vsel = 2.5 V–5.0 V[28],
TA = –10 °C–85 °C
2.5
–
3.6
V
IOUT
Output current
TA = 0 °C–70 °C
VBAT = 0.5 V–0.8 V
0
–
5
mA
TA = –10 °C–85 °C VBAT = 1.6 V–3.6 V
0
–
15
mA
VBAT = 0.8 V–1.6 V
0
–
25
mA
VBAT = 1.3 V–2.5 V
0
–
50
mA
VBAT = 2.5 V–3.6 V
0
–
50
mA
TA = –40 °C–85 °C VBAT = 1.8 V–2.5 V
0
–
50
mA
ILPK
Inductor peak current
–
–
700
mA
IQ
Quiescent current
Boost active mode
–
250
–
µA
Boost sleep mode, IOUT < 1 µA
–
25
–
µA
RegLOAD
Load regulation
–
–
10
%
RegLINE
Line regulation
–
–
10
%
Notes
26. Listed vsel options are characterized. Additional vsel options are valid and guaranteed by design.
27. The boost will start at all valid VBAT conditions including down to VBAT = 0.5 V.
28. If VBAT is greater than or equal to VOUT boost setting, then VOUT will be less than VBAT due to resistive losses in the boost circuit.



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