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SH33F2801P/032PR bảng dữ liệu(PDF) 47 Page - SINOWEALTH Electronic Ltd |
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SH33F2801P/032PR bảng dữ liệu(HTML) 47 Page - SINOWEALTH Electronic Ltd |
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47 / 407 page ![]() SH33F2801 47 9. Power Control (PWR) The system operating voltage (VDD) of SH33F2801 is 2.4 to 5.5V. An embedded linear voltage regulator is used to supply the system core power. The SH33F2801 has a complete set of power-on reset and brownout detection (BOD) circuits, the BOD is important in some battery applications. 9.1 Brownout Detection (BOD) Enable by setting register Both rising and falling can generate an interrupt Adjustable voltage detection Has hysteresis to reduce the impact of voltage fluctuations Hardware debounce, debounce time is about 60μs Wake-up stop mode Brownout detection is used to monitor the supply voltage. If the voltage is above or below the specified value, an internal flag is generated and an interrupt is generated. It is mainly used to detect changes in the voltage of power and is also used to monitor the power supply of the system. In some applications, it can be used for low-voltage detection, and the system software can take some protection measures according to it such as data backup, site retention, etc. BOD can cause an NMI interrupt, enabled by the IEN_BOD@SYSCFG_SAFR control bit. 9.2 Low-voltage Reset (LVR) In AC or high-capacity battery applications, switching on a large load can easily cause the MCU power supply to temporarily fall below the set operating voltage. A low voltage reset means that the protection system generates a valid reset below the set voltage. Can be chosen to be turned on via power control register, and can set LVR voltage via power control register Debounce time of LVR-TLVR is about 60µs. When power voltage is lower than the set voltage VLVR, internal reset will be generated. After LVR function is turned on, it has the following features (t indicates the duration of which the voltage is lower than the set voltage VLVR): When VDD ≤ VLVR and t ≥ TLVR, system reset is generated. When VDD > VLVR or VDD < VLVR, but the duration t < TLVR, system reset will not be generated. 9.3 Low Consumption Management SH33F2801 can reduce system power consumption by: Use low voltage power supply; Lower system clock; Turn off unused peripheral clocks on APB and AHB buses (default is off); Lower the current on GPIO and peripheral interface circuits; SH33F2801 supports two low power modes: Sleep Mode: basic low power mode, the MCU core stops running, but the peripherals used, including the core peripherals of the CPU, such as NVIC, SysTick, etc. are still running; Stop Mode: deep low power mode, in addition to shutdown of the core, most of the peripherals used are stopped, leaving only individual peripherals that are responsible for the wake-up task to keep running (clocks provided by LSI), such as IWDT, BOD, LVR, etc. Table9-1 Low Consumption Modes Mode Enter Wake-Up Wake-up Delay Sleep Mode WFI/WFE, keep SLEEPDEEP=0 Any interrupt/wake-up event/reset signal None Stop Mode WFI/WFE, keep SLEEPDEEP=1 Any external interrupt/reset signal 1. HSI wake-up time; 2. HSE and PLL wake-up time (if used); 3. Core power supply wake-up time. |
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