SH33F2801PSLASH032PR datasheet(18/407 Pages) SINOWEALTH

18 / 407 page

SH33F2801

LDRH

Rt, [Rn, Rm {, LSL #shift}]

Load Register Halfword (register offset)

LDRH

Rt, label

Load Register Halfword (literal)

LDRH, LDRHT

Rt, [Rn, #offset]

Load Register Halfword (immediate offset,

unprivileged)

LDRSB

Rt, [Rn, Rm {, LSL #shift}]

Load Register Signed Byte (register offset)

LDRSB

Rt, label

Load Register Signed Byte (PC-relative)

LDRSB, LDRSBT

Rt, [Rn, #offset]

Load Register Signed Byte (immediate offset,

unprivileged)

LDRSH

Rt, [Rn, Rm {, LSL #shift}]

Load Register Signed Halfword (register offset)

LDRSH

Rt, label

Load Register Signed Halfword (PC-relative)

LDRSH, LDRSHT

Rt, [Rn, #offset]

Load Register Signed Halfword (immediate offset,

unprivileged)

LSL, LSLS

Rd, Rm, <Rs|#n>

Logical Shift Left

N,Z,C

LSR, LSRS

Rd, Rm, <Rs|#n>

Logical Shift Right

N,Z,C

MCR,MCR2

{cond} coproc, #opc1, Rt,

CRn, CRm{, #opc2}

Move to Coprocessor from Register

MCRR,MCRR2

{cond} coproc, #opc1, Rt,

Rt2, CRm

Move to Coprocessor from two Registers

MLA

Rd, Rn, Rm, Ra

Multiply Accumulate

MLS

Rd, Rn, Rm, Ra

Multiply and Subtract

MOV, MOVS

Rd, Op2

Move

N,Z,C

MOV, MOVS

Rd, Rm

Move (register)

N,Z

MOVT

Rd, #imm16

Move Top

MOVW

Rd, #imm16

Move 16-bit constant

N,Z,C

MRC,MRC2

{cond} coproc, #opc1, Rt,

CRn, CRm{, #opc2}

Move to Register from | Coprocessor

MRRC,MRRC2

{cond} coproc, #opc1, Rt,

Rt2, CRm

Move to two Registers from Coprocessor.

MRS

Rd, spec_reg

Move from Special Register to general register

MSR

spec_reg, Rn

Move from general register to Special Register

MUL, MULS

{Rd,} Rn, Rm

Multiply

N,Z

MVN, MVNS

Rd, Op2

Bitwise NOT

N,Z,C

NOP

No Operation

ORN, ORNS

{Rd,} Rn, Op2

Logical OR NOT

N,Z,C

ORR, ORRS

{Rd,} Rn, Op2

Logical OR

N,Z,C

PKHTB, PKHBT

{Rd,} Rn, Rm, {, Op2}

Pack Halfword

PLD

[Rn {, #offset}]

Preload Data

POP

reglist

Pop registers from stack

PUSH

reglist

Push registers onto stack

QADD

{Rd,} Rn, Rm

Saturating Add

QADD16

{Rd,} Rn, Rm

Saturating Add 16

QADD8

{Rd,} Rn, Rm

Saturating Add 8

QASX

{Rd,} Rn, Rm

Saturating Add and Subtract with Exchange

QDADD

{Rd,} Rn, Rm

Saturating Double and Add

QDSUB

{Rd,} Rn, Rm

Saturating Double and

Subtract

QSAX

{Rd,} Rn, Rm

Saturating Subtract and Add with Exchange

QSUB

{Rd,} Rn, Rm

Saturating Subtract

QSUB16

{Rd,} Rn, Rm

Saturating Subtract 16

QSUB8

{Rd,} Rn, Rm

Saturating Subtract 8

RBIT

Rd, Rn

Reverse Bits

REV

Rd, Rn

Reverse byte order in a word

REV16

Rd, Rn

Reverse byte order in each halfword

REVSH

Rd, Rn

Reverse byte order in bottom halfword and sign extend

ROR, RORS

Rd, Rm, <Rs|#n>

Rotate Right

N,Z,C

RRX, RRXS

Rd, Rm

Rotate Right with Extend

N,Z,C

RSB, RSBS

{Rd,} Rn, Op2

Reverse Subtract

N,Z,C,V

SADD16

{Rd,} Rn, Rm

Signed Add 16

SH33F2801P/032PR bảng dữ liệu(PDF) 18 Page - SINOWEALTH Electronic Ltd

SH33F2801P/032PR bảng dữ liệu(HTML) 18 Page - SINOWEALTH Electronic Ltd

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL