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SH33F2801P/032PR bảng dữ liệu(PDF) 21 Page - SINOWEALTH Electronic Ltd

tên linh kiện SH33F2801P/032PR
Giải thích chi tiết về linh kiện  32-bit High Performance Motor Control MCU Based on ARM® Star
PDF  407 Pages
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nhà sản xuất  SINOWEALTH [SINOWEALTH Electronic Ltd]
Trang chủ  https://en.sinowealth.com
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SH33F2801P/032PR bảng dữ liệu(HTML) 21 Page - SINOWEALTH Electronic Ltd

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SH33F2801
21
UXTAH
{Rd,} Rn, Rm {,ROR #n}
Rotate, unsigned extend and Add Halfword
-
UXTB
Rd, Rm {,ROR #n}
Unsigned zero-extend Byte
-
UXTB16
{Rd,} Rm {,ROR #n}
Unsigned zero-extend Byte 16
-
UXTH
Rd, Rm {,ROR #n}
Unsigned zero-extend Halfword
-
VABS
.F32 Sd, Sm
Floating-point Absolute
-
VADD
.F32 {Sd,} Sn, Sm
Floating-point Add
-
VCMP
.F32 Sd, <<Sm| #0.0>
Compare two floating-point registers, or one floating
point register and zero
N,Z,C,V
VCMPE
.F32 Sd, <<Sm| #0.0>
Compare two floating-point registers, or one floating
point register and zero with Invalid Operation check
N,Z,C,V
VCVT
.F32.Tm <Sd>, Sm
Convert from floating-point to integer
-
VCVT
.Td.F32 Sd, Sd, #fbits
Convert from floating-point to fixed point
-
VCVTA
.Tm.F32 <Sd>, Sm
Convert from floating-point to integer with directed
rounding to nearest with Ties Away
-
VCVTB VCVTT
.F32.F16 Sd, Sm
Convert half-precision value to single-precision or
double-precision
-
VCVTB VCVTT
.F16.F32 Sd, Sm
Convert single-precision or double-precision register to
half-precision
-
VCVTM
.Tm.F32 <Sd>, Sm
Convert from floating-point to integer with directed
rounding towards Minus infinity
-
VCVTN
.Tm.F32 <Sd>, Sm
Convert from floating-point to integer with directed
rounding to nearest with Ties to even
-
VCVTP
.Tm.F32 <Sd>, Sm
Convert from floating-point to integer with directed
rounding towards Plus infinity
-
VCVTR
.Tm.F32 <Sd>, Sm
Convert between floating point and integer with
rounding.
-
VDIV
.F32 {Sd,} Sn, Sm
Floating-point Divide
-
VFMA
.F32 {Sd,} Sn, Sm
Floating-point Fused Multiply Accumulate
-
VFMS
.F32 {Sd,} Sn, Sm
Floating-point Fused Multiply Subtract
-
VFNMA
.F32 {Sd,} Sn, Sm
Floating-point Fused Negate Multiply Accumulate
-
VFNMS
.F32 {Sd,} Sn, Sm
Floating-point Fused Negate Multiply Subtract
-
VLDM
{mode}{.size} Rn{!}, list
Floating-point Load Multiple extension registers
-
VLDR
.F32 Sd, [<Rn> {, #offset}]
Floating-point Load an extension register from memory
(immediate)
-
VLDR
.F32 Sd, <label>
Load an extension register from memory
-
VLDR
.F32 Sd, [PC,#-0]
Load an extension register from memory
-
VLLDM
<c> Rn
Floating-point Lazy Load multiple
-
VLSTM
<c> Rn
Floating-point Lazy Store multiple
-
VMAXNM
.F32 Sd, Sn, Sm
Maximum of two floating point numbers with
IEEE754-2008 NaN handling
-
VMINNM
.F32 Sd, Sn, Sm
Minimum of two floating point numbers with
IEEE754-2008 NaN handling
-
VMLA
.F32 Sd, Sn, Sm
Floating-point Multiply Accumulate
-
VMLS
.F32 Sd, Sn, Sm
Floating-point Multiply Subtract
-
VMOV
<Sn|Rt>, <Rt|Sn>
Copy core register to single precision
-
VMOV
<Sm|Rt>, <Sm1| Rt2>,
<Rt|Sm>, <Rt2|Sm1>
Copy two core registers to two single-precision
-
VMOV
{.size} Dd[x], Rt
Copy core register to scalar
-
VMOV
{.dt} Rt, Dn[x]
Copy scalar to core register
-
VMOV
.F32 Sd, #immm
Floating-point Move immediate
-
VMOV
.F32 Sd, Sd, Sm
Copies the contents of one register to another
-
VMOV
<Dm|Rt>, <Rt| Rt2>,
<Rt2|Dm>
Floating-point Move transfers two words between two
core registers and a doubleword register
-
VMRS
Rt, FPSCR
Move to core register from floating-point Special
Register
N,Z,C,V
VMSR
FPSCR, Rt
Move to floating-point Special Register from core
register
-



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