CY8C52LP datasheet(112/114 Pages) CYPRESS

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PSoC® 5LP: CY8C52LP Family

Datasheet

Document Number: 001-84933 Rev. *L

Page 112 of 114

Document History Page

Description Title: PSoC® 5LP: CY8C52LP Family Datasheet Programmable System-on-Chip (PSoC®)

Document Number: 001-84933

Revision

ECN

Orig. of

Change

Submission

Date

Description of Change

3825653

MKEA

12/07/2012 Datasheet for new CY8C52LP family.

3897878

MKEA

02/07/2013 Removed Preliminary status

Updated characterization footnotes in Electrical Specifications.

Updated conditions for SAR ADC INL and DNL specifications in Table 11-19

Updated Table 11-63 (ILO AC Specifications).

Changed "UDB Configuration" to "UDB Working Registers” in Table 5-5.

Removed references to CAN.

Updated VREF accuracy.

Updated INL VIDAC spec.

Removed drift specs from Voltage Reference Specifications.

3902085

MKEA

02/12/2013 Changed Hibernate wakeup time from 125 µs to 200 µs in Table 6-3 and

Table 11-3.

4114902

MKEA

09/30/2013 Added information about 1 KB cache in Features.

Added warning on reset devices in the EEPROM section.

Added DBGEN field in Table 5-3.

Deleted statement about repeat start from the I2C section.

Removed TSTG spec from Table 11-1 and added a note clarifying the

maximum storage temperature range.

Updated chip Idd, regulator, SAR ADC, IDAC, and VDAC graphs.

Added min and max values for the Regulator Output Capacitor parameter.

Updated CIN specs in GPIO DC Specifications and SIO DC Specifications.

Updated rise and fall time specs in Fast Strong mode in Table 11-9, and

deleted related graphs.

Updated Voltage Reference Specifications and IMO AC Specifications.

Updated 100-TQFP package diagram.

Added Appendix for CSP package (preliminary.

4225729

MKEA

12/20/2013 Added SIO Comparator Specifications.

Changed THIBERNATE max value from 200 to 150.

Updated CSP package and ordering information.

Added 80 MHz parts in Table 12-1.

4386988

MKEA

05/22/2014 Updated General Description and Features.

Added More Information and PSoC Creator sections.

Updated JTAG IDs in Ordering Information.

Updated 100-TQFP package diagram.

4587100

MKEA

12/08/2014 Added link to AN72845 in Note 3.

Updated interrupt priority numbers in Section 4.4.

Updated Section 5.4 to clarify the factory default values of EEPROM.

Corrected ECCEN settings in Table 5-3.

Updated Section 6.1.1 and Section 6.1.2.

Added a note below Figure 6-4.

Updated Figure 6-12.

Changed ‘Control Store RAM’ to ‘Dynamic Configuration RAM’ in Figure 7-4

and changed Section 7.2.2.2 heading to ‘Dynamic Configuration RAM’.

Updated Section 7.7.

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