TMS320VC5502 datasheet(44/189 Pages) TI

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Clock

Generator

PGPIO

HPI

(16-Bit

Non-Multiplexed

Mode)

TIMER0

TIMER1

McBSP0

WD Timer

TIMER3

(DSP/BIOS

Timer)

GPIO

McBSP1

UART

I2C

McBSP2

EMIF

CLKOUT, X1

X2/CLKIN

TIM0

TIM1

GPIO[7:0]

SCL, SDA

PGPIO[45:0]

HDS1, HDS2, HPIENA

HINT, HRDY

CLKR0, FSR0, CLKX0, FSX0

DR0

DX0

CLKR1, FSR1, CLKX1, FSX1

DR1

DX1

HA[15:0], HD[15:0], HCNTL0,

HCNTL1, HCS, HR/W

Interrupt

Control

NMI/WDTOUT(A)

INT[3:0], RESET

IACK

Shading denotes a peripheral module not available for this configuration.

(A ) The NMI/WDTOUT pin has NMI function by default, but can be set to WDTOUT through the TSSR.

3.5

Timers

TMS320VC5502

Fixed-Point Digital Signal Processor

SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004

Figure 3-5. Configuration Example B

(GPIO6 = 0 and GPIO7 = 0 at Reset)

The 5502 has four 64-bit timers: Timer 0, Timer 1, Watchdog Timer (WDT), and Timer 3. The first two

timers, Timer 0 and Timer 1, are mainly used as general-purpose timers. The third timer, the Watchdog

Timer, can be used as either a general-purpose timer or a watchdog timer. The fourth timer is reserved as

a DSP/BIOS counter; users have no access to this timer.

Functional Overview

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