TMS320VC5502 datasheet(38/189 Pages) TI

38 / 189 page

www.ti.com

3.3

Configurable External Ports and Signals

3.3.1

Parallel Port Mux

TMS320VC5502

Fixed-Point Digital Signal Processor

SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004

• A Universal Asynchronous Receiver/Transmitter (UART)

For detailed information on the C55x DSP peripherals, see the following documents:

• TMS320VC5501/5502 DSP Instruction Cache Reference Guide (literature number SPRU630)

• TMS320VC5501/5502 DSP Timers Reference Guide (literature number SPRU618)

• TMS320VC5501/5502/5503/5507/5509 DSP Inter-Integrated Circuit (I2C) Module Reference Guide

(literature number SPRU146)

• TMS320VC5501/5502 DSP Host Port Interface (HPI) Reference Guide (literature number SPRU620)

• TMS320VC5501/5502 DSP Direct Memory Access (DMA) Controller Reference Guide (literature

number SPRU613)

• TMS320VC5501/5502/5503/5507/5509/5510 DSP Multichannel Buffered Serial Port (McBSP) Refer-

ence Guide (literature number SPRU592)

• TMS320VC5501/5502 DSP External Memory Interface (EMIF) Reference Guide (literature number

SPRU621)

• TMS320VC5501/5502 DSP Universal Asynchronous Receiver/Transmitter (UART) Reference Guide

(literature number SPRU597)

A number of pins on the 5502 have two functions, a feature that allows system designers to choose an

appropriate media interface for his/her application without the need for a large pin-count package. Three

muxes are included in the 5502 to control the configuration of these dual-function pins: the Parallel Port

Mux, the Host Port Mux, and the Serial Port 2 Mux. The state of these muxes is set at reset based on the

state of the GPIO6 and GPIO7 pins. The External Bus Selection Register (XBSR) reflects the

configuration of these muxes after the 5502 comes out of reset.

The Parallel Port Mux of the 5502 controls the function of 20 address signals (pins A[21:2]), 32 data

signals (pins D[31:0]), and 16 control signals (pins C0 through C15). The Parallel Port Mux supports two

different modes:

• Full EMIF mode: The EMIF is enabled and its 20 address, 32 data, and 16 control signals are routed

to their corresponding pins on the Parallel Port Mux.

• Non-multiplexed HPI mode: The HPI is enabled with its 16 address, 16 data, and 9 control signals

routed to their corresponding pins on the Parallel Port Mux. Moreover, 16 control signals, 4 address

signals, and 16 data signals of the Parallel Port Mux that are not needed for HPI operation are set to

general-purpose I/O (PGPIO).

The mode of the Parallel Port Mux is determined by the state of the GPIO6 pin at reset. If GPIO6 is low,

the EMIF will be disabled and the HPI will be enabled in non-multiplexed mode: pins A[17:2] are set to

HPI.HA[15:0] and pins D[15:0] are set to HPI.HD[15:0]. All address, data, and control signals in the

Parallel Port Mux not needed by the HPI are set to parallel general-purpose I/O. The Parallel/Host Port

Mux Mode bit field in the External Bus Selection Register (XBSR) will also be set to 0 to reflect the

non-multiplexed HPI mode of the Parallel Port Mux.

If GPIO6 is high at reset, the HPI will be enabled in multiplexed mode and the EMIF will be fully enabled:

pins A[21:2] are set to EMIF.A[21:2], pins D[31:0] are set to EMIF[31:0], and pins C[15:0] are set to their

corresponding EMIF operation. The Parallel/Host Port Mux Mode bit field in the XBSR will be set to 1 to

reflect the full EMIF mode of the Parallel Port Mux. Note that in multiplexed mode, the HPI will use the

HD[7:0] pins to strobe in address and data information (see Section 3.8, Host-Port Interface (HPI), for

more information on the operation of the HPI in multiplexed and non-multiplexed modes).

Table 3-4 lists the individual routing of the EMIF, PGPIO, and HPI signals to the external parallel address,

data, and control buses.

Functional Overview

TMS320VC5502 bảng dữ liệu(PDF) 38 Page - Texas Instruments

TMS320VC5502 bảng dữ liệu(HTML) 38 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL