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ADC32RF83 bảng dữ liệu(PDF) 107 Page - Texas Instruments |
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ADC32RF83 bảng dữ liệu(HTML) 107 Page - Texas Instruments |
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107 / 138 page ![]() 107 ADC32RF80, ADC32RF83 www.ti.com SBAS774A – MAY 2016 – REVISED DECEMBER 2016 Product Folder Links: ADC32RF80 ADC32RF83 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 8.5.12.22.1 Register 038h (address = 038h), Decimation Filter Page Figure 212. Register 038h 7 6 5 4 3 2 1 0 TEST PATTERN DDC2 Q-DATA TEST PATTERN DDC2 I -DATA R/W-0h R/W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 95. Register 038h Field Descriptions Bit Field Type Reset Description 7-4 TEST PATTERN DDC2 Q-DATA W 0h These bits select the test patten for the Q stream of the DDC2. 0000 = Normal operation using ADC output data 0001 = Outputs all 0s 0010 = Outputs all 1s 0011 = Outputs toggle pattern: output data are an alternating sequence of 10101010101010 and 01010101010101 0100 = Output digital ramp: output data increment by one LSB every clock cycle from code 0 to 65535 0110 = Single pattern: output data are a custom pattern 1 (75h and 76h) 0111 Double pattern: output data alternate between custom pattern 1 and custom pattern 2 1000 = Deskew pattern: output data are AAAAh 1001 = SYNC pattern: output data are FFFFh 3-0 TEST PATTERN DDC2 I -DATA R/W 0h These bits select the test patten for the I stream of the DDC2. 0000 = Normal operation using ADC output data 0001 = Outputs all 0s 0010 = Outputs all 1s 0011 = Outputs toggle pattern: output data are an alternating sequence of 10101010101010 and 01010101010101 0100 = Output digital ramp: output data increment by one LSB every clock cycle from code 0 to 65535 0110 = Single pattern: output data are a custom pattern 1 (75h and 76h) 0111 Double pattern: output data alternate between custom pattern 1 and custom pattern 2 1000 = Deskew pattern: output data are AAAAh 1001 = SYNC pattern: output data are FFFFh 8.5.12.22.2 Register 039h (address = 039h), Decimation Filter Page Figure 213. Register 039h 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 USE COMMON TEST PATTERN W-0h W-0h W-0h W-0h W-0h W-0h W-0h R/W-0h LEGEND: R/W = Read/Write; W = Write only; -n = value after reset Table 96. Register 039h Field Descriptions Bit Field Type Reset Description 7-1 0 W 0h Must write 0 0 USE COMMON TEST PATTERN R/W 0h 0 = Each data stream sends test patterns programmed by bits[3:0] of register 37h. 1 = Test patterns are individually programmed for the I and Q stream of each DDC using the TEST PATTERN DDCx y-DATA register bits (where x = 1 or 2 and y = I or Q). |
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