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ADC32RF83 bảng dữ liệu(PDF) 94 Page - Texas Instruments

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tên linh kiện ADC32RF83
Giải thích chi tiết về linh kiện  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
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Trang chủ  http://www.ti.com
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ADC32RF83 bảng dữ liệu(HTML) 94 Page - Texas Instruments

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ADC32RF80, ADC32RF83
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8.5.11.8 Register 017h (address = 017h), JESD Digital Page
Figure 178. Register 017h
7
6
5
4
3
2
1
0
0
0
0
0
Lane0
POL
Lane1
POL
Lane2
POL
Lane3
POL
W-0h
R/W-0h
R/W-0h
R/W-0h
W-0h
W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 66. Register 017h Field Descriptions
Bit
Field
Type
Reset
Description
7
0
W
0h
Must write 0
6-4
0
R/W
0h
Must write 0
3-0
Lane[3:0] POL
W
0h
These bits set the polarity of the individual JESD output lanes.
0 = Polarity as given in the pinout (noninverted)
1 = Inverts polarity (positive, P, or negative, M)
8.5.11.9 Register 032h-035h (address = 032h-035h), JESD Digital Page
Figure 179. Register 032h
7
6
5
4
3
2
1
0
SEL EMP LANE 0
0
0
R/W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Figure 180. Register 033h
7
6
5
4
3
2
1
0
SEL EMP LANE 1
0
0
R/W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Figure 181. Register 034h
7
6
5
4
3
2
1
0
SEL EMP LANE 2
0
0
R/W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Figure 182. Register 035h
7
6
5
4
3
2
1
0
SEL EMP LANE 3
0
0
R/W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset



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