ADC32RF83 datasheet(37/138 Pages) TI

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IQ 3 GSPS

N/2

ADC

NCO 2,

16 Bits

3 GSPS

IQ data, 3 GSPS

RX1 IQ Output

GPIO

SYSREF

RX2 IQ Output

NCO 1,

16 Bits

NCO 3,

16 Bits

NCO 4,

16 Bits

RX1 Real Output

Wideband IQ Output

2,3

Wideband Real Output

RX2 Real Output

JESD204B

fOUT / 4

LPF

N/2

LPF

IQ data

Real[ ]

IQ data

ADC32RF80, ADC32RF83

www.ti.com

SBAS774A – MAY 2016 – REVISED DECEMBER 2016

Product Folder Links: ADC32RF80 ADC32RF83

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Additionally, the decimation filter block provides the option to convert the complex output back to real format at

twice the decimated, complex output rate. The filter response with a real output is identical to a complex output.

The band is centered in the middle of the Nyquist zone (mixed with fOUT / 4) based on a final output data rate of

fOUT.

8.3.4.1 Operating Mode: Receiver

In receiver mode, the DDC block can be configured to single- or dual-band operation, as shown in Figure 94.

Both DDC chains use the same decimation filter setting and the available options are discussed in the

Decimation Filters section. The decimation filter setting also directly affects the interface rate and number of

lanes of the JESD204B interface.

NOTE: Red traces show SYSREF going to the NCO blocks.

Figure 94. Decimation Filter Option for Single- or Dual-Band Operation

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