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ADC32RF83 bảng dữ liệu(PDF) 79 Page - Texas Instruments

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tên linh kiện ADC32RF83
Giải thích chi tiết về linh kiện  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
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ADC32RF83 bảng dữ liệu(HTML) 79 Page - Texas Instruments

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79
ADC32RF80, ADC32RF83
www.ti.com
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8.5.3 Master Page (M = 0)
8.5.3.1 Register 020h (address = 020h), Master Page
Figure 152. Register 020h
7
6
5
4
3
2
1
0
0
0
0
PDN SYSREF
0
0
PDN CHB
GLOBAL PDN
W-0h
W-0h
W-0h
R/W-0h
W-0h
R/W-0h
R/W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 38. Register 020h Field Descriptions
Bit
Field
Type
Reset
Description
7-5
0
W
0h
Must write 0
4
PDN SYSREF
R/W
0h
This bit powers down the SYSREF input buffer.
0 = Normal operation
1 = SYSREF input capture buffer is powered down and further
SYSREF input pulses are ignored
3-2
0
W
0h
Must write 0
1
PDN CHB
R/W
0h
This bit powers down channel B.
0 = Normal operation
1 = Channel B is powered down
0
GLOBAL PDN
R/W
0h
This bit enables the global power-down.
0 = Normal operation
1 = Global power-down enabled
8.5.3.2 Register 032h (address = 032h), Master Page
Figure 153. Register 032h
7
6
5
4
3
2
1
0
0
0
INCR CM
IMPEDANCE
0
0
0
0
0
W-0h
W-0h
R/W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 39. Register 032h Field Descriptions
Bit
Field
Type
Reset
Description
7-6
0
W
0h
Must write 0
5
INCR CM IMPEDANCE
R/W
0h
Only use this bit when analog inputs are dc-coupled to the
driver.
0 = VCM buffer directly drives the common point of biasing
resistors.
1 = VCM buffer drives the common point of biasing resistors with
> 5 kΩ
4-0
0
W
0h
Must write 0



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