ADC32RF83 datasheet(36/138 Pages) TI

36 / 138 page

IQ 3 GSPS

N/2

ADC

NCO 2,

16 Bits

3 GSPS

IQ data, 3 GSPS

RX1 IQ Output

GPIO

SYSREF

RX2 IQ Output

NCO 1,

16 Bits

NCO 3,

16 Bits

NCO 4,

16 Bits

RX1 Real Output

Wideband IQ Output

2,3

Wideband Real Output

RX2 Real Output

JESD204B

fOUT / 4

LPF

N/2

LPF

IQ data

Real[ ]

IQ data

ADC32RF80, ADC32RF83

SBAS774A – MAY 2016 – REVISED DECEMBER 2016

www.ti.com

Product Folder Links: ADC32RF80 ADC32RF83

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Example: fS = 2949.12 MSPS, Divide-by-4 (LMFS = 8411), K = 16

SYSREF = 2949.12 MSPS / LCM (4 ,64, 16) = 46.08 MHz / N

Operate SYSREF at 2.88 MHz (effectively divide-by-1024, N = 16)

For proper device operation, disable the SYSREF signal after the JESD synchronization is established.

8.3.4 DDC Block

The ADC32RF8x provides a sophisticated on-chip, digital down converter (DDC) block that can be controlled

through SPI register settings and the general-purpose input/output (GPIO) pins. The DDC block supports two

basic operating modes: receiver (RX) mode with single- or dual-band DDC and wide-bandwidth observation

receiver mode.

Note that the ADC32RF80 and ADC32RF83 are identical devices except the fact that the ADC32RF83 offers

only single-band DDC option whereas the ADC32RF80 offers both single-band and dual-band DDC options, as

shown in Table 3.

Table 3. DDC Option Availability

DDC OPTION

AVAILABILITY IN DEVICE

Wide-band DDC

ADC32RF80, ADC32RF83

Single-band DDC

ADC32RF80, ADC32RF83

Dual-band DDC

ADC32RF80 only

Each ADC channel is followed by two DDC chains consisting of the digital filter along with a complex digital mixer

with a 16-bit numerically-controlled oscillator (NCO), as shown in Figure 93. The NCOs allow accurate frequency

tuning within the Nyquist zone prior to the digital filtering. One DDC chain is intended for supporting a dual-band

DDC configuration in receiver mode and the second DDC chain supports the wide-bandwidth output option for

the observation configuration. At any given time, either the single-band DDC, the dual-band DDC, or the

wideband DDC can be enabled. Furthermore, three different NCO frequencies can be selected on that path and

are quickly switched using the SPI or the GPIO pins to enable wide-bandwidth observation in a multi-band

application.

NOTE: Red traces show SYSREF going to the NCO blocks.

Figure 93. DDC Chains Overview (One ADC Channel Shown)

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