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ADC32RF83 bảng dữ liệu(PDF) 23 Page - Texas Instruments |
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ADC32RF83 bảng dữ liệu(HTML) 23 Page - Texas Instruments |
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23 / 138 page ![]() Frequency of Input Common-Mode Signal (MHz) 0 50 100 150 200 250 10 15 20 25 30 35 40 45 D043 Input Frequency (MHz) -375 -225 -75 75 225 375 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 D044 Frequency of Signal on Supply (MHz) 0.02 0.05 0.2 0.5 1 2 3 45 7 10 20 50 100 200 500 15 25 35 45 55 65 75 D041 PSRR with 50-mVpp Signal on AVDD PSRR with 50-mVpp Signal on AVDD19 Input Frequency (MHz) 0 300 600 900 1200 1500 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 D042 Input Frequency (MHz) 0 300 600 900 1200 1500 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 D040 Input Clock Duty Cycle (%) 40 45 50 55 60 51 58 52 59 53 60 54 61 55 62 56 63 D039 SNR SFDR 23 ADC32RF80, ADC32RF83 www.ti.com SBAS774A – MAY 2016 – REVISED DECEMBER 2016 Product Folder Links: ADC32RF80 ADC32RF83 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Typical Characteristics (continued) typical values are specified at an ambient temperature of 25°C; minimum and maximum values are specified over an ambient temperature range of –40°C to +85°C; and ADC sampling rate = 2949.12 MSPS, DDC bypassed performance, 50% clock duty cycle, AVDD19 = 1.9 V, AVDD = DVDD = 1.15 V, –2-dBFS differential input, and 0-dB digital gain (unless otherwise noted) fIN = 3.5 GHz, AIN = –3 dBFS with 2-dB digital gain Figure 63. Performance vs Clock Duty Cycle fIN = 3.5 GHz, AIN = –3 dBFS, PSRR = 37 dB, fPSRR = 3 MHz, APSRR = 50 mVPP, AVDD = 1.9 V Figure 64. Power-Supply Rejection Ratio FFT for Test Signal on AVDD Supply Figure 65. Power-Supply Rejection Ratio vs Tone Frequency CMRR = 32 dB, fCMRR = 32 dB, APSRR = 50 mVPP Figure 66. Common-Mode Rejection Ratio FFT fIN = 1.8 GHz, AOUT = –2 dBFS Figure 67. Common-Mode Rejection Ratio vs Tone Frequency fIN = 1.78 GHz, AIN = –2 dBFS, fS = 2949.12 MSPS, SNR = 60.6 dBFS, SFDR (includes IL) = 75 dBc Figure 68. FFT in 4X Decimation (Complex Output) |
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