AD9689-2000EBZ datasheet(91/134 Pages) AD

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Data Sheet

AD9689

Rev. A | Page 91 of 134

LATENCY

END TO END TOTAL LATENCY

Total latency in the AD9689 is dependent on the chip

application mode and the JESD204B configuration. For any

given combination of these parameters, the latency is

deterministic; however, the value of this deterministic latency

must be calculated as described in the Example Latency

Calculations section.

Table 37 shows the combined latency through the ADC and

digital signal processor (DSP) for the different chip application

modes supported by the AD9689. Table 38 shows the latency

through the JESD204B block for each application mode based

on the M/L ratio. For Table 37 and Table 38, latency is typical

and is in units of the encode clock. The latency through the

JESD204B block does not depend on the output data type (real

or complex). Therefore, data type is not included in Table 38.

To determine the total latency, select the appropriate ADC + DSP

latency from Table 37 and add it to the appropriate JESD204B

latency from Table 38. Example calculations are provided in the

following section.

EXAMPLE LATENCY CALCULATIONS

Example Configuration 1 is as follows:

•

ADC application mode = full bandwidth

•

Real outputs

•

L = 8, M = 2, F = 1, S = 2 (JESD204B mode)

•

20 × (M/L) = 5

•

Latency = 31 + 44 = 75 encode clocks

Example Configuration 2 is as follows:

•

ADC application mode = DCM4

•

Complex outputs

•

L = 4, M = 2, F = 1, S = 1 (JESD204B mode)

•

20 × (M/L) = 10

•

Latency = 162 + 88 = 250 encode clocks

LMFC REFERENCED LATENCY

Some FPGA vendors may require the end user to know the

LMFC referenced latency to make appropriate deterministic

latency adjustments. If they are required, use the latency values

in Table 37 and Table 38 for the analog in to LMFC and LMFC

to data out latency values.

Table 37. Latency Through the ADC + DSP Blocks (Number of Sample Clocks)1

Chip Application Mode

Enabled Filters

ADC + DSP Latency

Full Bandwidth

Not applicable

DCM1 (Real)

HB1

DCM2 (Complex)

HB1

DCM3 (Complex)

TB1

102

DCM2 (Real)

HB2 + HB1

162

DCM4 (Complex)

HB2 + HB1

162

DCM3 (Real)

TB2 + HB1

212

DCM6 (Complex)

TB2 + HB1

212

DCM4 (Real)

HB3 +HB2 + HB1

292

DCM8 (Complex)

HB3 +HB2 + HB1

292

DCM5 (Real)

FB2 + HB1

380

DCM10 (Complex)

FB2 + HB1

380

DCM6 (Real)

TB2 + HB2 + HB1

424

DCM12 (Complex)

TB2 + HB2 + HB1

424

DCM15 (Real)

FB2 + TB1

500

DCM8 (Real)

HB4 + HB3 + HB2 + HB1

552

DCM16 (Complex)

HB4 + HB3 + HB2 + HB1

552

DCM10 (Real)

FB2 + HB2 + HB1

694

DCM20 (Complex)

FB2 + HB2 + HB1

694

DCM12 (Real)

TB2 + HB3 + HB2 + HB1

814

DCM24 (Complex)

TB2 + HB3 + HB2 + HB1

814

DCM30 (Complex)

HB2 + FB2 + TB1

836

DCM20 (Real)

FB2 + HB3 + HB2 + HB1

1420

DCM40 (Complex)

FB2 + HB3 + HB2 + HB1

1420

DCM24 (Real)

TB2 + HB4 + HB3 + HB2 + HB1

1594

DCM48 (Complex)

TB2 + HB4 + HB3 + HB2 + HB1

1594

DCMx indicates the decimation ratio.

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