AD9689-2000EBZ datasheet(35/134 Pages) AD

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Data Sheet

AD9689

Rev. A | Page 35 of 134

Clock Jitter Considerations

High speed, high resolution ADCs are sensitive to the quality of

the clock input. Calculate the degradation in SNR at a given

input frequency (fA) due only to aperture jitter (tJ) by

SNRJITTER = −20 × log10 (2 × π × fA × tJ)

In this equation, the rms aperture jitter represents the root

mean square of all jitter sources, including the clock input,

analog input signal, and ADC aperture jitter specifications.

Intermediate frequency (IF) undersampling applications are

particularly sensitive to jitter (see Figure 95).

130

120

110

100

1000

10000

ANALOG INPUT FREQUENCY (MHz)

12.5

100

200

400

800

Figure 95. Ideal SNR vs. Analog Input Frequency and Jitter

Treat the clock input as an analog signal when aperture jitter

may affect the dynamic range of the AD9689. Separate power

supplies for clock drivers from the ADC output driver supplies

to avoid modulating the clock signal with digital noise. If the

clock is generated from another type of source (by gating,

dividing, or other methods), retime the clock by the original clock

at the last step. Refer to the AN-501 Application Note and the

AN-756 Application Note for more information about jitter

performance as it relates to ADCs.

Figure 96 shows the estimated SNR of the AD9689 across input

frequency for different clock induced jitter values. Estimate the

SNR by using the following equation:

SNR (dBFS) = −10log10























 −











 −

JITTER

ADC

SNR

10M

100M

10G

INPUT FREQUENCY (Hz)

100

125

150

175

200

Figure 96. Estimated SNR Degradation vs. Input Frequency and RMS Jitter

for the 2.6 GSPS

POWER-DOWN AND STANDBY MODE

The AD9689 has a PDWN/STBY pin that can be used to

configure the device in power-down or standby mode. The

default operation is PDWN. The PDWN/STBY pin is a logic

high pin. When in power-down mode, the JESD204B link is

disrupted. The power-down option can also be set via

In standby mode, the JESD204B link is not disrupted and transmits

zeros for all converter samples. Change this transmission using

TEMPERATURE DIODE

The AD9689 contains diode-based temperature sensors. The

diodes output voltages commensurate to the temperature of the

silicon. There are multiple diodes on the die, but the results

established using the temperature diode at the central location

of the die can be regarded as representative of the entire die.

However, in applications where only one channel is used (the

other channel being in a power-down state), it is recommended

to read the temperature diode corresponding to the channel

that is on. Figure 97 shows the locations of the diodes in the

AD9689 with voltages that can be output to the VREF pin. In

each location, there is a pair of diodes, one of which is 20× the

size of the other. It is recommended to use both diodes in a

location to obtain an accurate estimate of the die temperature.

For more information, see the AN-1432 Application Note.

ADC

DIGITAL

VREF

JESD204B DRIVER

TEMPERATURE DIODE

LOCATIONS

CHANNEL A, CENTRAL,

CHANNEL B

Figure 97. Temperature Diode Locations in the Die

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