IS43LD16640C datasheet(66/142 Pages) ISSI

66 / 142 page

IS43/46LD16640C

IS43/46LD32320C

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

07/02/2021

® Long-term Support

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Partial-Array Self Refresh – Bank Masking

Devices in densities of 64Mb–512Mb are comprised of four banks; densities of 1Gb and higher are

comprised of eight banks. Each bank can be configured independently whether or not a SELF RE-

FRESH operation will occur in that bank. One 8-bit mode register (accessible via the MRW com-

mand) is assigned to program the bank-masking status of each bank up to eight banks. For bank

masking bit assignments, see the MR16 PASR Bank Mask (MA[7:0] = 010h) and MR16 Op-Code

Bit Definitions tables.

The mask bit to the bank enables or disables a refresh operation of the entire memory space

within the bank. If a bank is masked using the bank mask register, a REFRESH operation to the

entire bank is blocked and bank data retention is not guaranteed in self refresh mode. To enable a

REFRESH operation to a bank, the corresponding bank mask bit must be programmed as “un-

masked.” When a bank mask bit is unmasked, the array space being refreshed within that bank is

determined by the programmed status of the

segment mask bits.

Partial-Array Self Refresh – Segment Masking

Programming segment mask bits is similar to programming bank mask bits. For densities 1Gb

and higher, eight segments are used for masking (see the MR17 PASR Segment Mask (MA[7:0]

= 011h) and MR17 PASR Segment Mask Definitions tables). A mode register is used for program-

ming segment mask bits up to eight bits. For densities less than 1Gb, segment masking is not

supported.

When the mask bit to an address range (represented as a segment) is programmed as“masked,”

a REFRESH operation to that segment is blocked. Conversely, when a segment mask bit to an ad-

dress range is unmasked, refresh to that segment is enabled.

A segment masking scheme can be used in place of or in combination with a bank masking

scheme. Each segment mask bit setting is applied across all banks. For segment masking bit as-

signments, see the tables noted above.

Bank and Segment Masking Example

Note: This table provides values for an 8-bank device with REFRESH operations masked to banks 1 and 7, and segments 2 and 7.

Segment Mask (MR17)

Bank 0

Bank 1

Bank 2

Bank 3

Bank 4

Bank 5

Bank 6

Bank 7

Bank Mask (MR16)

100000

Segment 0

0–

M–

––––

Segment 1

0–

M–

––––

Segment 21

Segment 3

0–

M–

––––

Segment 4

0–

M–

––––

Segment 5

0–

M–

––––

Segment 6

0–

M–

––––

Segment 71

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