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ADC32RF83 bảng dữ liệu(PDF) 112 Page - Texas Instruments

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tên linh kiện ADC32RF83
Giải thích chi tiết về linh kiện  ADC32RF8x Dual-Channel, 3-GSPS Telecom Receiver and Feedback Devices
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ADC32RF83 bảng dữ liệu(HTML) 112 Page - Texas Instruments

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ADC32RF80, ADC32RF83
SBAS774A – MAY 2016 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: ADC32RF80 ADC32RF83
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8.5.13.7 Register 00Eh (address = 00Eh), Power Detector Page
Figure 226. Register 00Eh
7
6
5
4
3
2
1
0
0
0
0
0
TIMECONST
W-0h
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 104. Register 00Eh Field Descriptions
Bit
Field
Type
Reset
Description
7-4
0
W
0h
Must write 0
3-0
TIMECONST
R/W
0h
These bits set the crossing detector time period for N = 0 to 15
as 2N × fS / 8 clock cycles. The maximum time period is 32768 ×
fS / 8 clock cycles (approximately 87 µs at 3 GSPS).
8.5.13.8 Register 00Fh, 010h-012h, and 016h-019h (address = 00Fh, 010h-012h, and 016h-019h), Power
Detector Page
Figure 227. Register 00Fh
7
6
5
4
3
2
1
0
FIL0THH[7:0]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 228. Register 010h
7
6
5
4
3
2
1
0
FIL0THH[15:8]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 229. Register 011h
7
6
5
4
3
2
1
0
FIL0THL[7:0]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 230. Register 012h
7
6
5
4
3
2
1
0
FIL0THL[15:8]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset
Figure 231. Register 016h
7
6
5
4
3
2
1
0
FIL1THH[7:0]
R/W-0h
LEGEND: R/W = Read/Write; -n = value after reset



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