PCI9060ES datasheet(99/192 Pages) ETC

99 / 192 page

SECTION 5

PCI 9080

PIN DESCRIPTION

©PLX Technology, Inc., 1997

Page 90

Version 1.02

5.2 PIN OUT COMMON TO ALL BUS MODES

Table 5-2. Power and Ground Pin Description

Symbol

Signal Name

Total

Pins

Type

Number

Function

TEST

Test

Test Pin. Pull high for test, low for normal operation. When TEST is

pulled high, all outputs except USERO (pin 27) are placed in tri-state.

USERO provides a NAND-TREE output when TEST is pulled high.

VDDL (Core)

Power (+5 V)

53, 68, 105,

144, 157, 167

Five volt power supply pins for core.

Liberal .01 µF to .1 µF decoupling capacitors should be placed near

the PCI 9080.

VDDH (PCI)

Power

(+5 V or +3.3 V)

38, 60, 83

Power supply pins for PCI bus pins.

Liberal .01 µF to .1 µF decoupling capacitors should be placed near

the PCI 9080.

VDDH

(Local)

Power

(+5 V)

1, 124, 184

Power supply pins for local bus pins.

Liberal .01 µF to .1 µF decoupling capacitors should be placed near

the PCI 9080.

VSS

Ground

22, 37, 45,

52, 59, 67,

75, 82, 90,

98, 104, 114,

123,

134, 143,

156, 166,

183, 193, 208

Ground pins.

Table 5-3. Serial EEPROM Interface Pin Description

Symbol

Signal Name

Total

Pins

Type

Number

Function

EECS

Serial EEPROM Chip

Select

8 mA

176

Serial EEPROM chip select.

EEDI

Serial EEPROM Data

8 mA

172

Write data to serial EEPROM.

EEDO

Serial EEPROM Data

OUT

171

Read data from serial EEPROM.

EESK

Serial Data Clock

8 mA

173

Serial EEPROM clock.

SHORT#

Load Short

174

When active low, only five 32-bit registers are loaded from the serial

EEPROM. When active high, all local configuration registers are also

loaded from serial EEPROM.

EESEL

Serial EEPROM

Select

175

When high, use 93CS46 (1K bit) serial EEPROM.

When low, use 93CS56 (2K bit) serial EEPROM.

Note:

Serial EEPROM interface operates at the core voltage (+5 V). PCI 9080 requires the use of a serial EEPROM that

can operate up to 1 MHz.

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