XM33C321ASPZR datasheet(90/122 Pages) TI2

90 / 122 page

Table 8-21. RTC Instances and Key Features (continued)

RTC Features

RTC_A

Selectable binary or binary-coded decimal (BCD) format

Yes

Leap-year correction (valid for year 1901 through 2099)

Yes

Two customizable calendar alarm interrupts based on minute, hour, day of the week, and day of the month

Yes

Interval alarm interrupt to wake every minute, every hour, at midnight, or at noon

Yes

Periodic interrupt to wake at 4096, 2048, 1024, 512, 256, or 128Hz

Yes

Periodic interrupt to wake at 64, 32, 16, 8, 4, 2, 1, and 0.5Hz

Yes

Interrupt capability down to STANDBY mode with STOPCLKSTBY

Yes

Calibration for crystal offset error and crystal temperature drift (up to ±240ppm total)

Yes

RTC clock output to pin for calibration (GPIO)

Yes

RTC clock output to pin for calibration (TIO)

Yes

Three bit prescaler for heartbeat function with interrupt generation

Yes

RTC external clock selection of untrimmed 32kHz, trimmed 512Hz, 256Hz or 1Hz

Yes

RTC time stamp capture upon detection of a timer stamp event, including:

•

TIO event

•

VDD fail event

Yes

RTC counter lock function

Yes

For more details, see the RTC chapter of the MSPM33C3x 160-MHz Microcontrollers Technical Reference

Manual.

8.16.3 IWDT

The independent watchdog timer (IWDT) in the LFSS is a device-independent supervisor which monitors code

execution and overall hang up scenarios of the device. Due to the nature of LFSS, this IWDT has its own system

independent power and clock source. If the application software does not successfully reset the watchdog within

the programmed time, the watchdog generates a POR reset to the device.

Key features of the IWDT include:

• A 26-bit counter with closed and open window

• Counter driven from LFOSC (fixed 32kHz clock path) with a programmable clock divider

• Eight selectable watchdog timer periods

For more details, see the IWDT chapter of the MSPM33C3x 160-MHz Microcontrollers Technical Reference

Manual.

8.16.4 WWDT

The windowed watchdog timer (WWDT) can be used to supervise the operation of the device, specifically code

execution. The WWDT can be used to generate a reset or an interrupt if the application software does not

successfully reset the watchdog within a specified window of time. Key features of the WWDT include:

• 26-bit counter

• Programmable clock divider

• Eight software selectable watchdog timer periods

• Eight software selectable window sizes

• Support for stopping the WWDT automatically when entering a sleep mode

• Interval timer mode for applications which do not require watchdog functionality

For more details, see the WWDT chapter of the MSPM33C3x 160-MHz Microcontrollers Technical Reference

Manual.

MSPM33C321A, MSPM33C3219

SLASFB6A – DECEMBER 2025 – REVISED SEPTEMBER 2026

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