XM33C321ASPZR datasheet(76/122 Pages) TI2

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8.11 IOMUX

The IOMUX peripheral enables IO pad configuration and controls digital data flow to and from the device pins.

The key features of the IOMUX include:

• IO Pad configuration registers allow for programmable drive strength, speed, pullup-down, and more

• Digital pin muxing allows for multiple peripheral signals to be routed to the same IO pad

• Pin functions and capabilities are user-configured using the PINCM register

• GPIO pins with Standard-drive with wake functionality can wake-up the device from SHUTDOWN mode

For more details, see the IOMUX chapter of the MSPM33C3x 160-MHz Microcontrollers Technical Reference

Manual.

8.11.1 Input/Output Diagrams

The IOMUX manages the selection of which peripheral function is to be used on a digital IO. It also provides the

controls for the output driver, input path, and the wake-up logic for wakeup from SHUTDOWN mode. For more

information, refer to the IOMUX section of the MSPM33C3x 160-MHz Microcontrollers Technical Reference

Manual.

The mixed-signal IO pin slice diagram for a full featured IO pin is shown in Figure 8-1. Not all pins will have

analog functions, wake-up logic, drive strength control, and pullup or pulldown resistors available. See the

device-specific data sheet for detailed information on what features are supported for a specific pin.

MSPM33C321A, MSPM33C3219

SLASFB6A – DECEMBER 2025 – REVISED SEPTEMBER 2026

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XM33C321ASPZR bảng dữ liệu(PDF) 76 Page - Texas Instruments