XM33C321ASPZR datasheet(44/122 Pages) TI2

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THERMAL METRIC(1)

PACKAGE

VALUE

UNIT

RθJA

Junction-to-ambient thermal resistance

NFBGA-100 (ZAW)

35.89

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

13.69

°C/W

RθJB

Junction-to-board thermal resistance

18.47

°C/W

ΨJT

Junction-to-top characterization parameter

0.45

°C/W

ΨJB

Junction-to-board characterization parameter

18.37

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

RθJA

Junction-to-ambient thermal resistance

WCSP-79 (YSG)

58.9

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

0.16

°C/W

RθJB

Junction-to-board thermal resistance

9.4

°C/W

ΨJT

Junction-to-top characterization parameter

0.1

°C/W

ΨJB

Junction-to-board characterization parameter

11.2

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Supply Current Characteristics

7.5.1 RUN/SLEEP Modes

VDD=3.3V. All inputs tied to 0V or VDD. Outputs do not source or sink any current. All peripherals are disabled.

PARAMETER

VDD

MCLK

-40°C

25°C

85°C

105°C

125°C

UNIT

TYP MAX TYP MAX TYP MAX TYP MAX TYP MAX

RUN Mode

IDD (Run)

MCLK=SYSPLL,

SYSPLLREF=SYSOSC

CoreMark, execute from flash

3.3V 160MHz

33.6

38 33.7

36 34.8

41 35.8

46 37.9

3.3V 80MHz

17.8

22 17.9

20 18.9

25 19.8

29 24.9

MCLK=SYSOSC, CoreMark,

execute from flash

3.3V 32MHz

12.6

14 12.8

15 14.1

16 15.4

19 18.3

IDD

(Run) per

MHz

MCLK=SYSPLL,

SYSPLLREF=SYSOSC

CoreMark, execute from flash

3.3V 160MHz

210

229

211

216

217

248

224

277

237

340

µA/Mhz

MCLK=SYSPLL,

SYSPLLREF=SYSOSC

While(1), execute from flash

3.3V 160MHz

206

213

207

211

213

243

220

273

232

332

SLEEP Mode

IDD

(Sleep)

MCLK=SYSPLL,

SYSPLLREF=SYSOSC CPU is

halted

160MHz

16 15.5 16.5 20.5 25.5

MCLK=SYSOSC, CPU is halted

32MHz

3.5

3.8

9.2

11.6

14 14.2

7.5.2 STOP/STANDBY Modes

VDD=3.3V, VBAT=3.3V. All inputs in VDD domain tied to 0V or VDD, All inputs in VBAT Island tied to 0V or VBAT. Outputs do

not source or sink any current. All peripherals not noted are disabled.

PARAMETER

ULPCLK

-40°C

25°C

85°C

105°C

125°C

UNIT

TYP MAX

STOP Mode

IDD (Stop)

SYSOSC=32MHz,

USE4MHZSTOP=1,

DISABLESTOP=0

4MHz

129

200

143

221

213

372

255

440

300

470

µA

STANDBY Mode

MSPM33C321A, MSPM33C3219

SLASFB6A – DECEMBER 2025 – REVISED SEPTEMBER 2026

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