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XM33C321ASPZR bảng dữ liệu(PDF) 49 Page - Texas Instruments |
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XM33C321ASPZR bảng dữ liệu(HTML) 49 Page - Texas Instruments |
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49 / 122 page  over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SYSOSCACC SYSOSC frequency accuracy when frequency correction loop (FCL) is enabled when the internal ROSC resistor is used, 32MHz(1) (2) (3) SETUSEFCL=1, -40 ℃ ≤ Ta ≤ 125 ℃ -2.1 1.6 % SYSOSC frequency accuracy when frequency correction loop (FCL) is enabled when the internal ROSC resistor is used, 32MHz(1) (2) (3) SETUSEFCL=1, Ta = 25 ℃ -1.2 1.3 % SYSOSC frequency accuracy when frequency correction loop (FCL) is enabled when the internal ROSC resistor is used, 4MHz(1) (2) (3) SETUSEFCL=1, Ta = 25 ℃ -1.2 1.7 % SYSOSC frequency accuracy when frequency correction loop (FCL) is enabled when the internal ROSC resistor is used, 4MHz(1) (2) (3) SETUSEFCL=1, -40 ℃ ≤ Ta ≤ 125 ℃ -2.3 1.8 % SYSOSC accuracy when frequency correction loop (FCL) is disabled, 32MHz(2) (3) SETUSEFCL=0,SYSOSCCFG.FREQ= 0 -40 ℃ ≤ Ta ≤ 125 ℃ -2.6 1.8 % SYSOSC accuracy when frequency correction loop (FCL) is disabled, for factory trimmed frequencies, 4MHz(2) (3) SETUSEFCL=0,SYSOSCCFG.FREQ= 1 -40 ℃ ≤ Ta ≤ 125 ℃ -2.7 2.3 % tsettle, SYSOSC Settling time to target accuracy SETUSEFCL=1 45 µs (1) The SYSOSC frequency correction loop (FCL) enables high SYSOSC accuracy via an internal reference resistor when using the FCL. See the SYSOSC section of the technical reference manual for details on computing SYSOSC accuracy. (2) SYSOSC Accuracy is measured in the default power-up state, with MCLK = SYSOSC, the CPU is running a while(1) loop, and the SYSPLL is disabled. (3) SYSOSC is measured with the internal FCC counter using an external 1ms pulse as the measurement trigger. 7.8.2 High Frequency Crystal/Clock over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT High frequency crystal oscillator (HFXT) fHFXT HFXT frequency HFXTRSEL=00 4 8 MHz HFXTRSEL=01 8.01 16 HFXTRSEL=10 16.01 32 HFXTRSEL=11 32.01 48 MHz DCHFXT HFXT duty cycle HFXTRSEL=00 40 65 % HFXTRSEL=01 40 60 HFXTRSEL=10 40 60 HFXTRSEL=11 40 60 OAHFXT HFXT crystal oscillation allowance HFXTRSEL=00 (4 to 8MHz range) 2 kΩ CL, eff Integrated effective load capacitance(1) 1 pF tstart, HFXT HFXT start-up time (2) HFXTRSEL=11, 32MHz crystal 0.5 ms IHFXT HFXT current consumption fHFXT=4MHz, Rm=300Ω, CL=12pF 75 µA fHFXT=32MHz, Rm=30Ω, CL=12pF, Cm=6.26fF, Lm=1.76mH 600 High frequency digital clock input (HFCLK_IN) fHFIN HFCLK_IN frequency (3) USEEXTHFCLK=1 4 48 MHz www.ti.com MSPM33C321A, MSPM33C3219 SLASFB6A – DECEMBER 2025 – REVISED SEPTEMBER 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: MSPM33C321A MSPM33C3219 |
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