IMX93CEC datasheet(71/123 Pages) NXP

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TPM_CHn

Figure 42. TPM timing

Table 74. TPM output timing parameters

Parameter

Min

Max

Unit

PWM Module Clock Frequency

83.3

MHz

PWM output pulse width high

—

PWM output pulse width low

—

4.12.9 FlexSPI timing parameters

The FlexSPI interface can work in SDR or DDR modes. FlexSPI

n_MCR0[RXCLKSRC] = 0 and FlexSPIn_MCR0[RXCLKSRC] =

1 configurations are supported when I/O is supplied by 3.3 V and 1.8 V, while FlexSPI

n_MCR0[RXCLKSRC] = 3 configuration is

supported when I/O is supplied by 1.8 Vonly.

Input timing assumes an input signal slew rate of 1 ns (20%/80%) and Output timing valid for maximum external load CL = 15 pF,

which is assumed to be a 8 pF load at the end of a 50 ohm, un-terminated, 2-inch microstrip trace on standard FR4 (3.3 pF/inch).

For best signal integrity, the series resistance of the transmission line should be matched closely to the selected RDSON of the

I/O pad output driver.

The DSE[5:0] = 001111 and FSEL1[1:0] = 11 are required drive settings to meet the timing.

4.12.9.1 FlexSPI input/read timing

There are three sources for the internal sample clock of FlexSPI read data:

• Dummy read strobe generated by FlexSPI controller and looped back internally (FlexSPI

n_MCR0[RXCLKSRC] = 0x0)

• Dummy read strobe generated by FlexSPI controller and looped back through the DQS pad (FlexSPI

n_MCR0[RXCLKSRC]

= 0x1)

• Read strobe provided by memory device and input from DQS pad (FlexSPI

n_MCR0[RXCLKSRC] = 0x3)

The following sections describe input signal timing for each of these three internal sample clock sources.

4.12.9.1.1 SDR mode with FlexSPIn_MCR0[RXCLKSRC] = 0x0, 0x1

Table 75. FlexSPI input timing in SDR mode where FlexSPI

n_MCR0[RXCLKSRC] = 0X0 (Nominal and Overdrive mode)

Symbol

Parameter

Min

Max

Unit

—

Frequency of operation[1]

—

MHz

Setup time for incoming data

—

Hold time for incoming data

—

NXP Semiconductors

IMX93CEC

i.MX 93 Applications Processors Data Sheet for Commercial Products

IMX93CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 12 February 2026

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