IMX93CEC datasheet(47/123 Pages) NXP

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Table 52. ADC electrical specifications

Symbol

Description

Min

Typ

Max

Unit

Notes

VADIN

Input voltage

VGND

—

VDDA

[1]

fAD_CK

ADC clock frequency

—

MHz

—

Csample

Sample cycles

5.5

—

Cycle

—

Ccompare

Fixed compare cycles

—

Cycle

—

Cconversion

Conversion cycles

Cconversion = Csample + Ccompare

Cycle

—

CAD_INPUT

ADC input capacitance

—

[2]

RAD_INPUT

ADC input series resistance

—

1.25

KΩ

—

DNL

ADC differential nonlinearity

—

±2

—

LSB

[3]

INL

ADC integral nonlinearity

—

±6

—

LSB

[3]

RAS

Analog source resistance

—

KΩ

—

Bandgap

Output voltage ready time

for bandgap

—

µs

[4]

ENOB

Effective number of bits:

Single-ended mode (11 x 11

mm package, PWM)

—

9.8

—

bit

[5],[6],[7],[8]

Effective number of bits:

Single-ended mode (11 x 11

mm package, PFM)

—

9.4

—

Effective number of bits:

Single-ended mode (9 x 9 mm

package, PWM)

—

9.2

—

Effective number of bits:

Single-ended mode (9 x 9 mm

package, PFM)

—

8.5

—

Effective number of bits:

Single-ended mode (14 x 14

mm package, PWM)

—

10.5

—

Effective number of bits:

Single-ended mode (14 x 14

mm package, PFM)

—

10.1

—

[1] On or off channels

[2] ADC component plus pad capacitance (~ 2 pF)

[3] After calibration

[4] Based on simulation test

[5] Noise on the ADC reference voltage (VDD_ANA1P8) will result in performance loss of the ADC proportional to the noise present.

[6] Input data used for test is 1 kHz sine wave.

[7] Measured at VREFH = 1.8 V and pwrsel = 2.

NXP Semiconductors

IMX93CEC

i.MX 93 Applications Processors Data Sheet for Commercial Products

IMX93CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 12 February 2026

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