IMX93CEC datasheet(16/123 Pages) NXP

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Table 12. Power supplies of the DRAM controller and PHY...continued

Power supplies

Modules

VDD2_DDR

1.1 V DRAM PHY I/O supply

VDDQ_DDR

0.6 V DRAM PHY I/O supply for LPDDR4X

For all the integrated analog modules, their 1.8 V analog power will be supplied externally through power pads. These supplies

are separated with other power pads on the package to keep them clean, but they can be directly shared with other power rails

on the board to reduce the number of power supplies from the PMIC.

For the integrated LVDS PHY, MIPI PHY, and USB PHYs, their 3.3 V (where supported), 1.8 V, and digital power will be supplied

externally through power pads. The powers to those PHYs are separated with other power pads on the package to keep them

clean, but they can be directly shared with other power rails on the board to reduce the number of power supplies from the PMIC.

For BBSM/RTC, the 1.8 V I/O pre-driver supply and 1.8 V I/O pad supply will also be supplied externally. The BBSM_LP core digital

domain logic is supplied by an internal LDO.

Figure 3 is the power architecture diagram for the whole chip. Note that it only shows power supplies, and does not show capacitors

that may be required for internal LDO regulators.

NXP Semiconductors

IMX93CEC

i.MX 93 Applications Processors Data Sheet for Commercial Products

IMX93CEC

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7 — 12 February 2026

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